mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-24 17:00:48 +02:00
Interpreter/ConversionOps: Move argument names over to IR names
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1 parent
944f400d19
commit
fc9be28d51
1 file changed
+36
-36
@@ -14,10 +14,10 @@ namespace FEXCore::CPU {
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#define DEF_OP(x) void InterpreterOps::Op_##x(IR::IROp_Header *IROp, IROpData *Data, IR::NodeID Node)
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DEF_OP(VInsGPR) {
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auto Op = IROp->C<IR::IROp_VInsGPR>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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__uint128_t Src1 = *GetSrc<__uint128_t*>(Data->SSAData, Op->Header.Args[0]);
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__uint128_t Src2 = *GetSrc<__uint128_t*>(Data->SSAData, Op->Header.Args[1]);
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auto Src1 = *GetSrc<__uint128_t*>(Data->SSAData, Op->DestVector);
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auto Src2 = *GetSrc<__uint128_t*>(Data->SSAData, Op->Src);
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uint64_t Offset = Op->DestIdx * Op->Header.ElementSize * 8;
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__uint128_t Mask = (1ULL << (Op->Header.ElementSize * 8)) - 1;
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@@ -35,31 +35,31 @@ DEF_OP(VInsGPR) {
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DEF_OP(VCastFromGPR) {
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auto Op = IROp->C<IR::IROp_VCastFromGPR>();
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memcpy(GDP, GetSrc<void*>(Data->SSAData, Op->Header.Args[0]), Op->Header.ElementSize);
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memcpy(GDP, GetSrc<void*>(Data->SSAData, Op->Src), Op->Header.ElementSize);
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}
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DEF_OP(Float_FromGPR_S) {
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auto Op = IROp->C<IR::IROp_Float_FromGPR_S>();
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uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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const uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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switch (Conv) {
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case 0x0404: { // Float <- int32_t
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float Dst = (float)*GetSrc<int32_t*>(Data->SSAData, Op->Header.Args[0]);
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const float Dst = (float)*GetSrc<int32_t*>(Data->SSAData, Op->Src);
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memcpy(GDP, &Dst, Op->Header.ElementSize);
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break;
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}
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case 0x0408: { // Float <- int64_t
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float Dst = (float)*GetSrc<int64_t*>(Data->SSAData, Op->Header.Args[0]);
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const float Dst = (float)*GetSrc<int64_t*>(Data->SSAData, Op->Src);
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memcpy(GDP, &Dst, Op->Header.ElementSize);
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break;
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}
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case 0x0804: { // Double <- int32_t
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double Dst = (double)*GetSrc<int32_t*>(Data->SSAData, Op->Header.Args[0]);
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const double Dst = (double)*GetSrc<int32_t*>(Data->SSAData, Op->Src);
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memcpy(GDP, &Dst, Op->Header.ElementSize);
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break;
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}
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case 0x0808: { // Double <- int64_t
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double Dst = (double)*GetSrc<int64_t*>(Data->SSAData, Op->Header.Args[0]);
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const double Dst = (double)*GetSrc<int64_t*>(Data->SSAData, Op->Src);
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memcpy(GDP, &Dst, Op->Header.ElementSize);
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break;
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}
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@@ -68,15 +68,15 @@ DEF_OP(Float_FromGPR_S) {
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DEF_OP(Float_FToF) {
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auto Op = IROp->C<IR::IROp_Float_FToF>();
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uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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const uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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switch (Conv) {
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case 0x0804: { // Double <- Float
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double Dst = (double)*GetSrc<float*>(Data->SSAData, Op->Header.Args[0]);
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const double Dst = (double)*GetSrc<float*>(Data->SSAData, Op->Scalar);
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memcpy(GDP, &Dst, 8);
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break;
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}
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case 0x0408: { // Float <- Double
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float Dst = (float)*GetSrc<double*>(Data->SSAData, Op->Header.Args[0]);
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const float Dst = (float)*GetSrc<double*>(Data->SSAData, Op->Scalar);
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memcpy(GDP, &Dst, 4);
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break;
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}
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@@ -86,14 +86,14 @@ DEF_OP(Float_FToF) {
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DEF_OP(Vector_SToF) {
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auto Op = IROp->C<IR::IROp_Vector_SToF>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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void *Src = GetSrc<void*>(Data->SSAData, Op->Header.Args[0]);
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void *Src = GetSrc<void*>(Data->SSAData, Op->Vector);
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uint8_t Tmp[16]{};
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uint8_t Elements = OpSize / Op->Header.ElementSize;
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const uint8_t Elements = OpSize / Op->Header.ElementSize;
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auto Func = [](auto a, auto min, auto max) { return a; };
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const auto Func = [](auto a, auto min, auto max) { return a; };
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switch (Op->Header.ElementSize) {
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DO_VECTOR_1SRC_2TYPE_OP(4, float, int32_t, Func, 0, 0)
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DO_VECTOR_1SRC_2TYPE_OP(8, double, int64_t, Func, 0, 0)
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@@ -104,14 +104,14 @@ DEF_OP(Vector_SToF) {
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DEF_OP(Vector_FToZS) {
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auto Op = IROp->C<IR::IROp_Vector_FToZS>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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void *Src = GetSrc<void*>(Data->SSAData, Op->Header.Args[0]);
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void *Src = GetSrc<void*>(Data->SSAData, Op->Vector);
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uint8_t Tmp[16]{};
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uint8_t Elements = OpSize / Op->Header.ElementSize;
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const uint8_t Elements = OpSize / Op->Header.ElementSize;
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auto Func = [](auto a, auto min, auto max) { return std::trunc(a); };
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const auto Func = [](auto a, auto min, auto max) { return std::trunc(a); };
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switch (Op->Header.ElementSize) {
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DO_VECTOR_1SRC_2TYPE_OP(4, int32_t, float, Func, 0, 0)
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DO_VECTOR_1SRC_2TYPE_OP(8, int64_t, double, Func, 0, 0)
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@@ -122,14 +122,14 @@ DEF_OP(Vector_FToZS) {
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DEF_OP(Vector_FToS) {
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auto Op = IROp->C<IR::IROp_Vector_FToS>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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void *Src = GetSrc<void*>(Data->SSAData, Op->Header.Args[0]);
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void *Src = GetSrc<void*>(Data->SSAData, Op->Vector);
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uint8_t Tmp[16]{};
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uint8_t Elements = OpSize / Op->Header.ElementSize;
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const uint8_t Elements = OpSize / Op->Header.ElementSize;
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auto Func = [](auto a, auto min, auto max) { return std::nearbyint(a); };
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const auto Func = [](auto a, auto min, auto max) { return std::nearbyint(a); };
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switch (Op->Header.ElementSize) {
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DO_VECTOR_1SRC_2TYPE_OP(4, int32_t, float, Func, 0, 0)
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DO_VECTOR_1SRC_2TYPE_OP(8, int64_t, double, Func, 0, 0)
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@@ -140,14 +140,14 @@ DEF_OP(Vector_FToS) {
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DEF_OP(Vector_FToF) {
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auto Op = IROp->C<IR::IROp_Vector_FToF>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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void *Src = GetSrc<void*>(Data->SSAData, Op->Header.Args[0]);
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void *Src = GetSrc<void*>(Data->SSAData, Op->Vector);
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uint8_t Tmp[16]{};
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uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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const uint16_t Conv = (Op->Header.ElementSize << 8) | Op->SrcElementSize;
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auto Func = [](auto a, auto min, auto max) { return a; };
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const auto Func = [](auto a, auto min, auto max) { return a; };
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switch (Conv) {
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case 0x0804: { // Double <- float
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// Only the lower elements from the source
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@@ -172,17 +172,17 @@ DEF_OP(Vector_FToF) {
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DEF_OP(Vector_FToI) {
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auto Op = IROp->C<IR::IROp_Vector_FToI>();
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uint8_t OpSize = IROp->Size;
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const uint8_t OpSize = IROp->Size;
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void *Src = GetSrc<void*>(Data->SSAData, Op->Header.Args[0]);
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void *Src = GetSrc<void*>(Data->SSAData, Op->Vector);
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uint8_t Tmp[16]{};
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uint8_t Elements = OpSize / Op->Header.ElementSize;
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auto Func_Nearest = [](auto a) { return std::rint(a); };
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auto Func_Neg = [](auto a) { return std::floor(a); };
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auto Func_Pos = [](auto a) { return std::ceil(a); };
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auto Func_Trunc = [](auto a) { return std::trunc(a); };
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auto Func_Host = [](auto a) { return std::rint(a); };
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const uint8_t Elements = OpSize / Op->Header.ElementSize;
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const auto Func_Nearest = [](auto a) { return std::rint(a); };
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const auto Func_Neg = [](auto a) { return std::floor(a); };
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const auto Func_Pos = [](auto a) { return std::ceil(a); };
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const auto Func_Trunc = [](auto a) { return std::trunc(a); };
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const auto Func_Host = [](auto a) { return std::rint(a); };
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switch (Op->Round) {
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case FEXCore::IR::Round_Nearest.Val:
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