LC
6cd2a48910
Merge pull request #5666 from Sonicadvance1/184
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FEXCore: Fixes a crash with multiblock if `ProcessorID` IR op is encountered
2026-07-09 10:16:06 -04:00
Ryan Houdek
9d18ecc5cb
FEXCore: Fixes a crash with multiblock if ProcessorID IR op is encountered
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If during multiblock code discovery a RDTSCP/RDPID instruction was
encountered then ProcessorID has an assert at JIT compile time. Make
sure to early exit with an illegal instruction encoding early instead.
Also make sure to correctly report RDPID support in CPUID, it's
technically a different bit than RDTSCP.
Fixes a crash in Crusader Kings 3's Paradox Launcher installer. Although
the installer seems to fail otherwise for some reason.
2026-07-08 17:41:03 -07:00
Ryan Houdek
5f2455c502
Merge pull request #5665 from lioncash/blendop
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[SVE256] Handle 256-bit blend operations much more efficiently
2026-07-08 16:43:20 -07:00
LC
6bc67609a3
[SVE256] Handle 256-bit blend operations much more efficiently
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We can massage a given selector into a valid predicate register bitmask
and then simply perform a merging move, which eliminates most busywork
around optimizing 256-bit blends.
In the future, once we drop SVE2.1 support in, we can use PMOV to
eliminate the load from memory and related constant management.
2026-07-08 17:35:12 -04:00
LC
1bd3945dd9
Merge pull request #5577 from Sonicadvance1/168
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Context: Add support for single-step RIP ranges
2026-07-08 15:47:28 -04:00
Ryan Houdek
168f4b1e6b
Context: Add support for single-step RIP ranges
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Useful when debugging a range.
2026-07-08 12:21:16 -07:00
LC
8a8827c980
Merge pull request #5664 from simon902/CMPXCHGZeroing
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OpcodeDispatcher: Fix 32bit cmpxchg zero extension with eax as first operand
2026-07-08 15:14:12 -04:00
Ryan Houdek
21a968b84d
Merge pull request #5663 from simon902/PDEPoverlap
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JIT/ALUOps: Fix operand overlapping bug for pdep
2026-07-08 11:08:12 -07:00
Simon Scherer
84fab84b3f
InstcountCI: Update
2026-07-08 15:00:18 +02:00
Simon Scherer
3d65c030a8
OpcodeDispatcher: Fix 32bit cmpxchg zero extension with eax as destination operand and remove incorrect comment.
2026-07-08 14:58:32 +02:00
Simon Scherer
59097bab20
unittests/ASM: Test cmpxchg with eax as destination
2026-07-08 14:52:19 +02:00
Simon Scherer
4cbacd9261
InstcountCI: Update
2026-07-08 10:10:30 +02:00
Simon Scherer
655102fc7d
JIT/ALUOps: Fix operand overlapping bug for pdep
2026-07-08 10:09:47 +02:00
Simon Scherer
f718f46545
unittests/ASM: Test overlapping operands for pdep
2026-07-08 09:47:12 +02:00
LC
71d4e2c320
Merge pull request #5660 from Sonicadvance1/183
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Wow64: Spin loop on atomic with WFE
2026-07-07 22:53:50 -04:00
Ryan Houdek
41241d7500
Wow64: Spin loop on atomic with WFE
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Instead of burning roughly a million watts, put this spinloop on a WFE.
This tends to occur on a crash during shutdown that isn't fully able to
be avoided. The least we can do is not consume all the power in the
world.
2026-07-07 16:09:00 -07:00
Ryan Houdek
b90c9836cb
Merge pull request #5662 from lioncash/alias
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OpcodeDispatcher: Remove asterisk from BMI source args
2026-07-07 11:22:59 -07:00
Ryan Houdek
aff3fcf76d
Merge pull request #5658 from neobrain/fix_woa_code_cache_ec
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CodeCache: Mark executable memory as EC code on ARM64EC
2026-07-07 11:22:15 -07:00
Ryan Houdek
ec2aa4063a
Merge pull request #5661 from lioncash/blend
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unittests: Add stress tests for VBLEND{PD, PS}
2026-07-07 11:13:56 -07:00
LC
718f2e01f7
OpcodeDispatcher: Remove asterisk from BMI source args
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Keeps it consistent with the rest of the code and prevents breakages
whenever the Ref alias gets turned into its own value type.
2026-07-07 14:07:38 -04:00
LC
ba9f7fb1b5
unittests: Add stress tests for VBLEND{PD, PS}
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Forgot about these two
2026-07-07 13:49:09 -04:00
Tony Wasserka
0ac6b3e8f3
CodeCache: Mark executable memory as EC code on ARM64EC
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See bd5b817c3a .
2026-07-07 15:55:27 +02:00
Ryan Houdek
dddad1c2ca
Merge pull request #5659 from lioncash/shuf
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unittests: Add stress tests for VSHUF{PD, PS}
2026-07-06 15:50:08 -07:00
LC
95bfff20a4
unittests: Add stress tests for VSHUF{PD, PS}
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Covers the remaining shuffle paths
2026-07-06 18:01:52 -04:00
LC
7a6f0def85
Merge pull request #5653 from Sonicadvance1/182
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Config: Fixes AppOverrides with FEX_APP_CONFIG
2026-07-06 17:01:55 -04:00
Ryan Houdek
103d4d76be
Config: Fixes AppOverrides with FEX_APP_CONFIG
2026-07-06 12:43:14 -07:00
Ryan Houdek
db9414a756
Merge pull request #5655 from neobrain/feature_woa_cache_loading
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Windows/ImageTracker: Adapt code cache loading logic to FEXOfflineCompiler
2026-07-06 12:40:40 -07:00
Ryan Houdek
5a0bf1bb5f
Merge pull request #5657 from neobrain/fix_foc_syscall_abi_woa
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FEXOfflineCompiler: Fix improper syscall ABI on WoA
2026-07-06 12:37:52 -07:00
LC
444c37fe2e
Merge pull request #5656 from neobrain/fix_invalid_iterator_deref
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Core: Fix dereference of invalid iterator
2026-07-06 10:13:04 -04:00
Tony Wasserka
d3d735370f
FEXOfflineCompiler: Fix improper syscall ABI on WoA
2026-07-06 15:16:30 +02:00
Tony Wasserka
852e93aa74
Core: Fix dereference of invalid iterator
2026-07-06 15:07:37 +02:00
Tony Wasserka
dc1be2efe8
Windows/ImageTracker: Unindent refactored code
2026-07-06 14:58:16 +02:00
Tony Wasserka
f2734ac608
Windows/ImageTracker: Adapt code cache loading logic to FEXOfflineCompiler
2026-07-06 14:58:16 +02:00
Tony Wasserka
57ca49dc5c
Merge pull request #5501 from bylaws/finishloadwin
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Windows/ImageTracker: Wire up LoadCache and EnableLoadedSection
2026-07-06 14:58:01 +02:00
Billy Laws
5ef3134a4d
Windows/ImageTracker: Wire up LoadCache and EnableLoadedSection
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The lazy code loading refactor replaced LoadData with the new
LoadCache/EnableLoadedSection API but left the Windows path as TODOs.
Implement the wiring: LoadAOTImages now calls LoadCache +
RegisterMappedCodeBuffer for each mapped cache file, and HandleImageMap
calls EnableLoadedSection (with nullptr thread since lazy mapping is not
yet implemented on Windows).
2026-07-06 14:44:59 +02:00
Ryan Houdek
5b91642883
Merge pull request #5654 from ShadowCurse/cache_va_size
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Allocator: fix the caching of host va size
2026-07-05 18:32:10 -07:00
Egor Lazarchuk
1eb5abb8db
Allocator: rename DetermineVASize to GetHostVABits
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`DetermineVASize` does not return the size of VA, but the number of bits
it can use. Change the naming to make it more self explanatory.
In the mean time also move `HostVASize` global into `GetHostVABits`
since it is not and should not be used directly.
2026-07-05 12:46:41 +01:00
Egor Lazarchuk
a65e1bf7e5
Allocator: fix the caching of host va size
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Commit abf9724 ("Allocator: Fix and optimize VA range detection")
removed assignment to the `HostVASize` global thus making each call to
`DetermineVASize` redo all the work with potential to produce incorrect
results. Set the global again to fix this.
2026-07-05 12:46:29 +01:00
Ryan Houdek
3f98202b0f
Merge pull request #5651 from lioncash/perm
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unittests: Add stress tests for VPERMIL{PD, PS}
2026-07-04 12:13:24 -07:00
LC
e7727c39f3
unittests: Add stress tests for VPERMIL{PD, PS}
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While unlikely to be used in practice over other kind of
shuffling and blending, these should also have stress tests
to make sure they do the right thing.
2026-07-04 15:00:30 -04:00
Ryan Houdek
17e5637664
Merge pull request #5650 from lioncash/aes256
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[SVE256] Handle 256-bit AES operations
2026-07-03 19:06:36 -07:00
LC
7fd9b897c2
[SVE256] Handle 256-bit AES operations
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Currently we split these into two 128-bit operations since VIXL doesn't
have support for the unified SVE operations yet.
Now we fully support VAES on SVE256.
2026-07-03 21:52:59 -04:00
Ryan Houdek
f8967aa207
Merge pull request #5649 from lioncash/pclmul256
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[SVE256] EncryptionOps: Handle 256-bit VPCLMULQDQ
2026-07-03 18:33:53 -07:00
LC
5145324806
[SVE256] EncryptionOps: Handle 256-bit VPCLMULQDQ
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Since vixl now handles this, we can drop this support right in.
2026-07-03 21:22:05 -04:00
Ryan Houdek
4233fb6270
Merge pull request #5648 from lioncash/aes
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[SVE256] Ensure SSE insertion behavior for AES/SHA/PCLMUL operations
2026-07-03 17:33:19 -07:00
LC
d11b19fd2b
[SVE256] Ensure insertion behavior for PCLMUL SSE operations
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Also includes accompanying test to ensure it never breaks.
2026-07-03 20:15:34 -04:00
LC
684c568033
[SVE256] Ensure insertion behavior for SHA SSE operations
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These slipped through, so now we can add tests for them to prevent that
from happening again.
2026-07-03 20:09:50 -04:00
LC
ab4fb7b3ad
[SVE256] Ensure insertion behavior for AES operations on SSE
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These slipped through, so now we can add tests for them to prevent that
from happening again.
2026-07-03 19:35:31 -04:00
Ryan Houdek
91017dbedb
Merge pull request #5647 from lioncash/perm128
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unittests: Add stress test for vperm2f128/vperm2i128
2026-07-03 15:32:34 -07:00
LC
f5e8a051a8
unittests: Add stress test for vperm2f128/vperm2i128
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Lets us test all possible immediate encodings for proper behavior.
2026-07-03 16:17:12 -04:00