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Code Issues Packages Projects Releases 67 Wiki Activity
6,178 Commits 11 Branches 71 Tags
92f2dc073791dc91ae020dbebfbaee837d1b082f
Commit Graph
2465 Commits
Author SHA1 Message Date
Ryan Houdek 7b790903c9 AOT: Convert set to fextl 
This worms its way all the way to the frontend
 2023-03-15 12:16:03 -07:00
Ryan Houdek a9a2c95202 Jit64: Convert unordered_map to fextl 
Interpreter just remove the destination as a map. This isn't useful
anymore.
 2023-03-15 12:14:59 -07:00
Ryan Houdek 6b053d298e VDSOEmulation: Convert vector to fextl 
Pipes back to thunk definitions in FEXCore as well.
 2023-03-15 12:08:58 -07:00
Ryan Houdek e8132b82d0 LookupCache: Convert vector to fextl 2023-03-15 12:05:42 -07:00
Ryan Houdek cdac296ce3 GDBServer: Convert vector to fextl 2023-03-15 12:05:37 -07:00
Ryan Houdek ffbcc52af6 Frontend/OpDispatcher: Convert vector to fextl 
These two are intrinsicly linked. Need to cover both at the same time.
 2023-03-15 12:05:30 -07:00
Ryan Houdek ddafc172fc CPUID: Convert vector to fextl 2023-03-15 12:05:26 -07:00
Ryan Houdek df17f7adbb JITs: Convert relocations vector to fextl 
Kind of goes places.
 2023-03-15 12:05:12 -07:00
Ryan Houdek 9ffbffe463 Interpreter: Convert vector to fextl 2023-03-15 12:05:07 -07:00
Ryan Houdek 1aaa03a10d Dispatcher: Removes signal frame stack 
This wasn't used anymore. Removed.
 2023-03-15 12:05:02 -07:00
Ryan Houdek e4b2ed72a8 CodeEmitter: Convert vector to fextl 
Needs #2506 merged first. First commit is cherry-picked from it.
 2023-03-15 12:04:57 -07:00
Lioncache 02e245d61f OpcodeDispatcher: Handle VCVTSI2SD 2023-03-14 15:36:54 -04:00
Lioncache 03724c8486 OpcodeDispatcher: Handle VCVTSI2SS 2023-03-14 15:28:55 -04:00
Lioncache f8a575a982 OpcodeDispatcher: Factor out CVTGPR_To_FPR impl to helper 
This can be used for the AVX implementations as well.
 2023-03-14 15:12:21 -04:00
Ryan Houdek 8633528cee Merge pull request #2502 from lioncash/flag 
OpcodeDispatcher: Handle VPINSRB/VPINSRD/VPINSRQ/VPINSRW
 2023-03-14 11:44:06 -07:00
Lioncache ce961a3ef4 OpcodeDispatcher: Handle VPINSRD/VPINSRQ 
These are handled from the same encoding via the VEX.W bit.
 2023-03-14 14:17:59 -04:00
Lioncache 8ce87d3b27 OpcodeDispatcher: Handle VPINSRW 2023-03-14 14:17:55 -04:00
Lioncache 24f03dd740 OpcodeDispatcher: Handle VPINSRB 2023-03-14 14:16:44 -04:00
Lioncache a1b0d1853b OpcodeDispatcher: Move PINSROp implementation to helper 2023-03-14 14:16:44 -04:00
Lioncache 6531d369cd Frontend: Handle 'op DST_XMM, SRC_XMM, GPR' AVX patterns 
Things like VPINSRB and co. use this pattern, as well as VCVTSI2S{D,S}.

No other VEX-encoded instructions expect the first source to be a GPR
aside from some of the BMI1/BMI2 instructions, so we'll need to check
for this case.
 2023-03-14 14:16:41 -04:00
Ryan Houdek 7344680672 Merge pull request #2501 from lioncash/ind 
ARMEmitter: Handle floating-point multiply add (indexed) groups
 2023-03-14 08:58:35 -07:00
Lioncache 16ae9ad1c7 ARMEmitter: Handle SVE floating point matrix multiply accumulate category 2023-03-14 11:37:49 -04:00
Lioncache 737400fd84 ARMEmitter: Handle SVE floating-point multiply (indexed) category 2023-03-14 11:22:51 -04:00
Lioncache 331cf66fda ARMEmitter: Make FCMLA (indexed) use the SVEFPMultiplyAddIndexed helper 
Same behavior, but without all of the code duplication.
 2023-03-14 11:19:19 -04:00
Lioncache 96c35a7bc7 ARMEmitter: Move fcmla (indexed) down to it's label 
Just code movement to get rid of a TODO.
 2023-03-14 11:05:14 -04:00
Lioncache 15903f5300 ARMEmitter: Handle SVE floating-point multiply-add (indexed) group 2023-03-14 11:01:49 -04:00
Ryan Houdek 3a81efdb28 Merge pull request #2494 from Sonicadvance1/sra_on_32bit 
Arm64: Reclaim SRA registers on 32-bit
 2023-03-14 07:30:00 -07:00
Ryan Houdek 64c45ed70a Arm64: Reclaim SRA registers on 32-bit 
Causes Portal to go from 85FPS to 120FPS on Lenovo X13s.

When running in 32-bit mode we were wasting 8 GPRs and 8 FPRs by still
allocating the top 8 registers of each even though 32-bit can't use
them.

Reallocate them to be register allocated registers when running 32-bit
applications which reduces spills and lowers the cost of
spilling/filling SRA registers.

Quite a significant speed boost for a little bit of work.
 2023-03-14 07:15:05 -07:00
Lioncache 02d7f68094 ARMEmitter: Handle SVE Floating Point Multiply-Add group 2023-03-14 09:57:23 -04:00
Mai 6e0a1a5f14 Merge pull request #2490 from Sonicadvance1/enable_fast_movs_cpuid 
CPUID: Enable FAST REP MOVS
 2023-03-13 16:20:17 -04:00
Mai ad332e3c30 Merge pull request #2492 from Sonicadvance1/signaldelegator_remove_unused 
SignalDelegator: Cleanup unused functions
 2023-03-13 16:19:48 -04:00
Ryan Houdek 1248f3573c CPUInfo: Switch away from using get_nprocs_conf 
Allocates memory behind our backs. Needed to make CI glibc allocator
clean.
 2023-03-13 10:50:25 -07:00
Ryan Houdek 11bbfe5bed SignalDelegator: Cleanup unused functions 
Also changes the error log to an assert log to ensure the crashing
process doesn't spin forever.
 2023-03-10 16:18:14 -08:00
Ryan Houdek 07aa5327f4 CPUID: Enable FAST REP MOVS 
Even without this being an optimal implementation, enabling this option
reduces the amount of time spent in memmove in Hollow Knight.

Before:
```
10.07%  [JIT] tid 284422  [.] /usr/lib/x86_64-linux-gnu/libc.so.6+0x17d780 (0x7fbcef8d6dfd)
```

After:
```
0.53%  [JIT] tid 288916  [.] /usr/lib/x86_64-linux-gnu/libc.so.6+0x17d780 (0x7f0cbe0dc608)
```
 2023-03-10 15:44:51 -08:00
Lioncache c6ba51ee35 ARMEmitter: Handle SVE floating-point compare with zero group 2023-03-09 01:13:33 -05:00
Lioncache 19125720c2 ARMEmitter: Handle SVE Floating-point Serial Reduction (Predicated) group 2023-03-09 00:16:38 -05:00
Lioncache 02d06ee833 ARMEmitter: Handle SVE Floating Point Unary Operations - Unpredicated group 2023-03-08 23:11:50 -05:00
Lioncache 640cfcd0bd ARMEmitter: Make LDR (predicate) take an XRegister 
Matches assembly use more closely.
 2023-03-08 22:45:15 -05:00
Lioncache 5d71dfed86 ARMEmitter: Handle LDR (vector) 
Now we have the vector variant as well as the predicate variant.
 2023-03-08 22:43:13 -05:00
Lioncache a06fc3641f ARMEmitter: Handle FTMAD 
Finishes off the only top-level instruction in the SVE Floating-Point
Arithemtic - Predicated group (also FTMAD is unpredicated, so cool).
 2023-03-08 22:13:49 -05:00
Lioncache 5cbf984743 ARMEmitter: Move op and assertions into SVEFloatArithmeticPredicated helper 
Deduplicates some code.
 2023-03-08 22:13:44 -05:00
Lioncache d9da63d492 OpcodeDispatcher: Handle VPSADBW 2023-03-08 21:02:44 -05:00
Lioncache 597ffe5ba6 OpcodeDispatcher: Factor out PSADBW implementation to helper 
This can be reused when implementing the AVX equivalent of the
operation.
 2023-03-08 18:40:59 -05:00
Lioncache 73ff932bb6 OpcodeDispatcher: Handle VTESTPD 2023-03-08 17:27:41 -05:00
Lioncache 9b742b1fac OpcodeDispatcher: Handle VTESTPS 2023-03-08 17:27:41 -05:00
Lioncache 8c63afb345 OpcodeDispatcher: Add helper for VTESTP{D,S} 2023-03-08 17:27:38 -05:00
Ryan Houdek c14f4355b7 Merge pull request #2478 from lioncash/maddubsw 
OpcodeDispatcher: Handle VPMADDUBSW
 2023-03-08 13:27:43 -08:00
Ryan Houdek 6645e68c95 Merge pull request #2477 from lioncash/mskb 
OpcodeDispatcher: Handle VPMOVMSKB
 2023-03-08 13:19:22 -08:00
Lioncache ff9de85851 OpcodeDispatcher: Handle VPMADDUBSW 2023-03-08 16:01:34 -05:00
Lioncache 4dca609614 OpcodeDispatcher: Factor out PMADDUBSW implementation into helper 
This will be used to centralize the SSE and AVX implementations.
 2023-03-08 15:40:17 -05:00