Ryan Houdek
7ba9aef304
Fixes AArch64 LLVM intrinsic typo
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arch64 != aarch64
2020-03-17 09:35:39 -07:00
Ryan Houdek
a16638844f
Merge pull request #31 from Sonicadvance1/fix_llvm_jit
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Implements all the ops missing in the LLVM JIT
2020-03-17 09:22:44 -07:00
Ryan Houdek
0a87cbf9d9
Merge pull request #30 from Sonicadvance1/aarch64_jit_fixes
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Get AArch64 JIT to feature parity of the x86 JIT
2020-03-17 09:22:34 -07:00
Ryan Houdek
4718493d6c
Merge pull request #27 from Sonicadvance1/fixes_jit_x86_#2
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x86-64 JIT unit test fixes
2020-03-17 09:22:17 -07:00
Ryan Houdek
568af31578
Implements all the ops missing in the LLVM JIT
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Lets the LLVM pass the unit tests as well as the interpreter and other
JITs
2020-03-15 22:30:11 -07:00
Ryan Houdek
1cf60f43cb
[AArch64] Implements vector integer length and narrow ops
2020-03-15 00:54:33 -07:00
Ryan Houdek
99d95d5bca
[AArch64] Implements float conversion ops
2020-03-15 00:53:49 -07:00
Ryan Houdek
deac8d5a75
[AArch64] Implements vector float compare ops
2020-03-15 00:52:43 -07:00
Ryan Houdek
823c803142
[AArch64] Fixes GPR<->FPR conversion moves
2020-03-15 00:45:50 -07:00
Ryan Houdek
702473d3a5
[AArch64] Implements vector shift by immediate ops
2020-03-15 00:44:35 -07:00
Ryan Houdek
4212d177a3
[AArch64] Fixes VSLI/VSRI for byte shifts larger than the register. Needs to zero the reg
2020-03-15 00:44:15 -07:00
Ryan Houdek
35317d0e8a
[AArch64] Fixes and implements vector shift ops
2020-03-15 00:43:06 -07:00
Ryan Houdek
a670d05274
[AArch64] Fixes VEXTR op
2020-03-15 00:42:11 -07:00
Ryan Houdek
8f1d5e9a4c
[AArch64] Fixes FRSQRT Op
2020-03-15 00:40:38 -07:00
Ryan Houdek
803bbe817e
[AArch64] Fixes FSQRT Op
2020-03-15 00:39:40 -07:00
Ryan Houdek
214728e19e
[AArch64] Implements vector saturating add/sub ops
2020-03-15 00:38:43 -07:00
Ryan Houdek
5530e9eb0e
[AArch64] Implements VUMULL IR op
2020-03-15 00:38:17 -07:00
Ryan Houdek
746f399e00
[AArch64] Implements VNOT op
2020-03-15 00:37:30 -07:00
Ryan Houdek
c79ee8314e
[AArch64] Implements SplatVector Ops
2020-03-15 00:37:14 -07:00
Ryan Houdek
cc68d1f88e
[AArch64] Implements VInsGPR Op
2020-03-15 00:36:51 -07:00
Ryan Houdek
180944a194
[AArch64] Fixes integer division and remainder ops
2020-03-15 00:35:09 -07:00
Ryan Houdek
9ae0930515
[AArch64] Implements FindTrailingZeros IR Op
2020-03-15 00:33:46 -07:00
Ryan Houdek
5f295ffc5e
[AArch64] Fixes FindMSB for 16bit and 32bit register sizes
2020-03-15 00:33:23 -07:00
Ryan Houdek
d75fed7691
[AArch64] Fixes ROR for 8bit and 16bit register sizes
2020-03-15 00:32:51 -07:00
Ryan Houdek
8686c0f269
[AArch64] Fixes Break IR op. No immediate offset on atomics.
2020-03-15 00:32:20 -07:00
Ryan Houdek
8c374142e6
[AArch64] Implements Load/Store context indexed
2020-03-15 00:31:25 -07:00
Ryan Houdek
1f112bccbb
[AArch64] Fixes VExtractToGPR for 8bit and 16bit sizes
2020-03-15 00:30:53 -07:00
Ryan Houdek
2a37f5fea6
Fixes FindTrailingZeros IR op for <64bit sizes in x86 JIT
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32bit and 16bit were returning wrong values for values of zero
2020-03-15 00:26:05 -07:00
Ryan Houdek
c4b40b2d8f
Implements vector shift by immediate ops
2020-03-13 17:55:28 -07:00
Ryan Houdek
664466b60f
Fixes 64bit Vector SToF
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Was just using the 32bit instruction on accident
2020-03-13 17:54:43 -07:00
Ryan Houdek
26aa13e7a9
Replaces x86 rsqrtss usage with sqrtss+divss
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x86 documentation only claims 1.5 * 2^-12 precision on rsqrtss.
Which was enough to make rsqrt of 1.0 be off by a significant amount
This made unit tests fail, so let's just make it more accurate
2020-03-13 17:52:26 -07:00
Ryan Houdek
de444dc62b
Fixes SplatVector IR Op
2020-03-13 17:52:07 -07:00
Ryan Houdek
39bac4efea
Fixes 32bit memory load op
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xbyak was silently treating this dword load as a 64bit load because the
destination was a 64bit register
2020-03-13 17:51:07 -07:00
Ryan Houdek
7fa3a318db
Division op fixes
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Some division ops weren't sign extending properly and implements 16bit
ops
2020-03-13 17:49:38 -07:00
Ryan Houdek
23d516d7f3
Fixes SHL/SHR ops
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Makes sure they are operating at the correct sizes.
Also removes the BMI2 SHRX/SHLX ops
2020-03-13 17:47:53 -07:00
Ryan Houdek
e426a622bb
Fixes PRINT op in IR JIT. Needs correct stack alignment
2020-03-13 17:47:25 -07:00
Ryan Houdek
cf106289d3
Removes bad vector BFE usage in MOVMSK op
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BFE isn't actually meant to be used on vector ops.
Interpreter got away with it because it doesn't have register classes.
Actually do a correct element extract and sign bit extraction
2020-03-13 17:45:36 -07:00
Ryan Houdek
4227a0cdc7
Removes old asserts from CMPS instruction
2020-03-13 17:45:14 -07:00
Ryan Houdek
79ffd11c1d
Cleans up and renames the CVT ops
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Fixes issue #14 .
A lot of these were named in very confusing ways.
Makes them very explicit about what the operation is doing
2020-03-13 17:42:39 -07:00
Ryan Houdek
121bed017c
Merge pull request #24 from Sonicadvance1/fixes_jit_x86
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Various fixes for the x86 JIT
2020-03-13 15:52:48 -07:00
Ryan Houdek
0e80dc27cc
Merge pull request #21 from Sonicadvance1/movshdup
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Implements Movshdup instruction
2020-03-13 15:52:24 -07:00
Ryan Houdek
30338dd7f4
Merge pull request #20 from Sonicadvance1/pextrw
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Implements PExtrw instruction
2020-03-13 15:52:09 -07:00
Ryan Houdek
78bcf3960d
Merge pull request #19 from Sonicadvance1/psrl_family
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Implements PSRL{W,D,Q} instruction family
2020-03-13 15:51:58 -07:00
Ryan Houdek
4459a048f7
Merge pull request #18 from Sonicadvance1/Interpreter/vushr
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Removes undefined behaviour in the VUSHR in interpreter
2020-03-13 13:04:56 -07:00
Ryan Houdek
d5481efa6b
Fixes AtomicFetch{Add,Sub} for 8bit and 16bit ops in the x86 JIT
2020-03-12 22:13:53 -07:00
Ryan Houdek
600f43779c
Fixes and implements a couple vector shift ops in the x86 JIT
2020-03-12 22:13:17 -07:00
Ryan Houdek
12288ab887
Fixes VFCMPLE in x86 JIT
2020-03-12 22:12:34 -07:00
Ryan Houdek
2c44338478
Implements VFCMPNEQ in x86 JIT
2020-03-12 22:11:52 -07:00
Ryan Houdek
2e34f25257
Implements VSQXTUN and VSQXTUN2 in x86 JIT
2020-03-12 22:11:36 -07:00
Ryan Houdek
d0a7685bfa
Implements VUMULL in x86 JIT
2020-03-12 22:11:18 -07:00