Fixes 32bit memory load op

xbyak was silently treating this dword load as a 64bit load because the
destination was a 64bit register

External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp

@@ -1660,7 +1660,7 @@ void *JITCore::CompileCode([[maybe_unused]] FEXCore::IR::IRListView<true> const
               }
               break;
               case 4: {
-                mov(Dst, dword [MemReg]);
+                mov(Dst.cvt32(), dword [MemReg]);
               }
               break;
               case 8: {