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Code Issues Packages Projects Releases 67 Wiki Activity
5,063 Commits 11 Branches 71 Tags
aac0824fd39dece74dee72041573f6dc16894163
Commit Graph
1712 Commits
Author SHA1 Message Date
lioncash aac0824fd3 x86_64/VectorOps: Separate 128-bit VFSub path 2022-11-16 18:21:29 +00:00
lioncash 1b32ca0b93 x86_64/VectorOps: Separate 128-bit VFAddP path 2022-11-16 18:19:13 +00:00
lioncash c29456aac9 x86_64/VectorOps: Separate 128-bit VFAdd path 2022-11-16 18:17:23 +00:00
lioncash 715f25d059 x86_64/VectorOps: Separate 128-bit VAbs path 2022-11-16 18:13:51 +00:00
lioncash c85e31ec7a x86_64/VectorOps: Separate 128-bit VURAvg path 2022-11-16 18:10:53 +00:00
lioncash 0d6bfc4fa4 x86_64/VectorOps: Separate 128-bit VSQSub path 2022-11-16 18:07:59 +00:00
lioncash 106917add2 x86_64/VectorOps: Separate 128-bit VSQAdd path 2022-11-16 18:06:17 +00:00
lioncash 1e10a2bac3 x86_64/VectorOps: Separate 128-bit VUQSub path 2022-11-16 18:02:09 +00:00
lioncash 63dd09cd6f x86_64/VectorOps: Separate 128-bit VUQAdd path 2022-11-16 17:56:37 +00:00
lioncash c7e6935f42 x86_64/VectorOps: Separate 128-bit VSub path 2022-11-16 17:54:57 +00:00
lioncash 1be5054e86 x86_64/VectorOps: Separate 128-bit VAdd path 2022-11-16 17:51:57 +00:00
lioncash f40755aca7 x86_64/VectorOps: Separate 128-bit VXor path 2022-11-16 17:49:25 +00:00
lioncash d49b78cf34 x86_64/VectorOps: Separate 128-bit VOr path 2022-11-16 17:46:49 +00:00
lioncash 10e80ae064 x86_64/VectorOps: Separate 128-bit VBic path 2022-11-16 17:44:10 +00:00
lioncash f3ebb214aa x86_64/VectorOps: Separate 128-bit VAnd path 2022-11-16 17:40:25 +00:00
lioncash dc41c3bd9f x86_64/VectorOps: Separate 128-bit VectorImm path 2022-11-16 17:40:14 +00:00
lioncash 1707b27d14 OpcodeDecoder: Only install AVX ops if host supports it 2022-11-15 19:57:08 +00:00
lioncash 7c92963eca x86_64/MemoryOps: Use unaligned loads/stores for 256-bit cases 
Alignment will always be a little finicky in this case, so let's just
use unaligned variants to make behavior always consistent.
 2022-11-15 19:57:08 +00:00
lioncash ecf82c90ee OpcodeDispatcher: Handle VMOVAPS 2022-11-15 19:57:05 +00:00
lioncash 580f06fe00 Frontend: Handle 256-bit vectors 2022-11-15 03:11:34 +00:00
lioncash f7367e56af IR: Handle 256-bit VExtr 
Extends VExtr to handle 256-bit vectors.
 2022-11-14 22:26:52 +00:00
Ryan Houdek 24696e6b98 IR: Removes the only uses of VSLI and VSRI 
We use these two IR ops for PSRLQ and PSLLQ respectively, Which is
actually implemented in a quite inefficient way.

Instead switch the ops over to using VExtr which maps directly to one
instruction and can emulate both.
 2022-11-13 19:51:31 -08:00
lioncash c713602d56 IR: Remove VLoadMemElement and VStoreMemElement 
These are unused, so we can get rid of them.
 2022-11-11 19:06:38 +00:00
Mai c8293cbbda Merge pull request #2137 from Sonicadvance1/pclmul_disable 
OpcodeDispatcher: Disable PCLMUL if not supported on host
 2022-11-10 22:23:48 +00:00
lioncash ad1d65e91a IR: Handle 256-bit LoadRegister 
Extends LoadRegister to handle 256-bit vectors.
 2022-11-09 03:19:38 +00:00
lioncash 3a6c7803e8 IR: Handle 256-bit StoreRegister 
Extends StoreRegister to handle 256-bit vectors.
 2022-11-09 03:19:34 +00:00
lioncash 1eae07f1b8 IR: Handle 256-bit VAddV 
Extends VAddV to handle 256-bit vectors.
 2022-11-08 18:21:30 +00:00
Ryan Houdek 1ac7cd5835 OpcodeDispatcher: Disable PCLMUL if not supported on host 
Might fix Steam on Pi4
 2022-11-05 12:11:45 -07:00
Ryan Houdek b1d98f4e58 Merge pull request #2134 from lioncash/temp 
Arm64/ConversionOps: Eliminate use of temporary in Vector_FToF
 2022-11-02 19:18:40 -07:00
Ryan Houdek 9e7daf61d0 Merge pull request #2133 from lioncash/inselem 
IR: Handle 256-bit VInsElement
 2022-11-02 18:59:18 -07:00
lioncash 6fbe25753b IR: Handle 256-bit VInsElement 
Extends VInsElem to handle 256-bit vectors.
 2022-11-03 01:43:42 +00:00
lioncash 5536f1e835 Arm64/ConversionOps: Eliminate use of temporary in Vector_FToF 
We can just use the destination register in this case.
 2022-11-02 23:50:28 +00:00
lioncash 17722dad6d IR: Handle 256-bit LoadContextIndexed 
Extends LoadContextIndexed to handle 256-bit vectors.
 2022-11-02 16:16:58 +00:00
lioncash 0371599996 IR: Handle 256-bit StoreContextIndexed 
Extends StoreContextIndexed to handle 256-bit vectors.
 2022-11-02 16:07:02 +00:00
lioncash 4ef35488db Arm64/MemoryOps: Merge if statement into switch in ParanoidLoadMemTSO 
There's nothing preventing the OpSize == 1 case from being merged into
the switch, so we can do that to make things a little more consistent.
 2022-11-02 03:45:17 +00:00
lioncash 418a27e47e IR: Handle 256-bit ParanoidStoreMemTSO 
Extends ParanoidStoreMemTSO to handle 256-bit vectors.
 2022-11-01 23:04:30 +00:00
lioncash 61c76d02cc IR: Handle 256-bit StoreMemTSO 
Extends StoreMemTSO to handle 256-bit vectors.
 2022-11-01 22:59:29 +00:00
lioncash d98641221d IR: Handle 256-bit StoreMem 
Extends StoreMem to handle 256-bit vectors.
 2022-11-01 21:39:52 +00:00
Ryan Houdek 8a14f87a44 Merge pull request #2129 from lioncash/memory 
IR: Handle 256-bit LoadMem/LoadMemTSO/ParanoidLoadMemTSO
 2022-11-01 14:23:19 -07:00
lioncash 02ce71734c IR: handle 256-bit ParanoidLoadTSO 
Extends ParanoidLoadTSO to handle 256-bit vectors.
 2022-11-01 21:02:42 +00:00
lioncash 96c2743280 IR: Handle 256-bit LoadMemTSO 
Extends LoadMemTSO to handle 256-bit vectors.
 2022-11-01 21:02:42 +00:00
lioncash 7bfc34b51c IR: Handle 256-bit LoadMem 
Extends LoadMem to handle 256-bit vectors.
 2022-11-01 21:02:38 +00:00
Ryan Houdek 40d820fd05 Merge pull request #2127 from lioncash/spill 
Arm64/MemoryOps: Remove lingering unnecessary ptrue instances
 2022-11-01 10:47:15 -07:00
lioncash d69287aaf7 Arm64/MemoryOps: Remove lingering unnecessary ptrue instances 
Gets rid of some leftover bits from when we didn't have statically
allocated predicate registers.
 2022-11-01 17:25:24 +00:00
Ryan Houdek d475b0ba9e Merge pull request #2126 from lioncash/ctx 
IR: Handle 256-bit LoadContext/StoreContext
 2022-11-01 10:22:26 -07:00
lioncash 1638b744b7 x86_64/MemoryOps: Ensure upper lane is cleared properly in FillRegister 
Ensures that loaded values don't potentially have junk in the upper
lane. Will prevent potential wonky situations when implementing AVX
instructions.
 2022-11-01 16:39:18 +00:00
lioncash 8b19894a06 IR: Handle 256-bit StoreContext 
Extends StoreContext to handle 256-bit vectors.
 2022-11-01 16:20:24 +00:00
lioncash d04e40b5fd Interpreter/MiscOps: Remove unused StopThread() function 
This has been unused since ff1d51c7bd

Silences a compiler warning.
 2022-11-01 15:59:17 +00:00
lioncash 75d797b5cd IR: Handle 256-bit LoadContext 
Extends LoadContext to handle 256-bit vectors.
 2022-11-01 14:54:26 +00:00
Ryan Houdek 0e1a418678 WIP: Segment register index optimization 
Segment registers are indexed significantly more than they are changed.
Pay the cost of indexing during the set and store rather than the per
register index.

Should be a fairly significant performance improvement for 32-bit
applications. At least on hardware that doesn't have a data dependent
prefetcher.

Breaks Steam atm and isn't clean.
 2022-10-31 19:42:30 -07:00