lioncash
c7ad066987
IR: Handle 256-bit VFCMPUNO
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Extends VFCMPUNO to handle 256-bit vectors.
2022-10-06 15:43:01 +00:00
lioncash
f4d229f1ba
IR: Handle 256-bit VFCMPORD
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Extends VFCMPORD to handle 256-bit vectors.
2022-10-06 15:33:30 +00:00
Ryan Houdek
25a8a00771
Merge pull request #2050 from lioncash/vfcmplt
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IR: Handle 256-bit VFCMPLT/VFCMPGT/VFCMPLE
2022-10-04 14:44:54 -07:00
Ryan Houdek
a67f7422b2
Merge pull request #2049 from lioncash/fcmeq
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IR: Handle 256-bit VFCMPEQ/VFCMPNEQ
2022-10-04 14:43:52 -07:00
Ryan Houdek
ed8150cfb6
Merge pull request #2048 from lioncash/vcmpgt
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IR: Handle 256-bit VCMPGT/VCMPGTZ/VCMPLTZ
2022-10-04 14:42:53 -07:00
Ryan Houdek
462a163ba7
Merge pull request #2047 from lioncash/vcmpeq
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IR: Handle 256-bit VCMPEQ/VCMPEQZ
2022-10-04 14:40:48 -07:00
lioncash
280b15ba2a
IR: Handle 256-bit VFCMPLE
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Extends VFCMPLE to handle 256-bit vectors.
2022-10-04 19:56:59 +00:00
lioncash
2a0b488e99
IR: Handle 256-bit VFCMPGT
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Extends VFCMPGT to handle 256-bit vectors.
2022-10-04 19:43:32 +00:00
lioncash
3ef7c4ab51
IR: Handle 256-bit VFCMPLT
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Extends VFCMPLT to handle 256-bit vectors.
2022-10-04 19:29:36 +00:00
lioncash
e72d746036
IR: Handle 256-bit VFCMPNEQ
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Extends VFCMPNEQ to handle 256-bit vectors.
2022-10-04 19:02:20 +00:00
lioncash
0bb4091e34
IR: Handle 256-bit VFCMPEQ
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Extends VFCMPEQ to handle 256-bit vectors.
2022-10-04 18:44:12 +00:00
lioncash
6822fc595c
IR: Handle 256-bit VCMPLTZ
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Extends VCMPLTZ to handle 256-bit vectors.
2022-10-04 18:09:39 +00:00
lioncash
a506a589dd
IR: Handle 256-bit VCMPGTZ
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Extends VCMPGTZ to handle 256-bit vectors.
2022-10-04 17:55:03 +00:00
lioncash
684a5977dd
IR: Handle 256-bit VCMPGT
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Extends VCMPGT to handle 256-bit registers.
2022-10-04 17:38:20 +00:00
lioncash
ac3682e058
IR: Handle 256-bit VCMPEQZ
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Extends VCMPEQZ to handle 256-bit vectors.
2022-10-04 16:57:19 +00:00
lioncash
d5faf01f5a
IR: Handle 256-bit VCMPEQ
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Extends VCMPEQ to handle 256-bit vectors.
2022-10-04 16:33:25 +00:00
lioncash
ecba1b6838
IR: Handle 256-bit VBSL
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Extends VBSL to handle 256-bit vectors.
2022-10-03 18:06:27 +00:00
Ryan Houdek
8d8b029285
Merge pull request #2044 from lioncash/vumax
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IR: Handle 256-bit VSMax/VUMax
2022-09-29 13:52:40 -07:00
lioncash
bf6f855868
IR: Handle 256-bit VSMax
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Extends VSMax to handle 256-bit vectors.
2022-09-29 20:31:19 +00:00
Ryan Houdek
aa6a499329
Merge pull request #2043 from lioncash/vumin
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IR: Handle 256-bit VSMin/VUMin
2022-09-29 13:19:07 -07:00
lioncash
0971650ef9
IR: Handle 256-bit VUMax
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Extends VUMax to handle 256-bit vectors.
2022-09-29 20:18:42 +00:00
Ryan Houdek
64c4fdccf7
Merge pull request #2042 from lioncash/vnot
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IR: Handle 256-bit VNot
2022-09-29 13:13:23 -07:00
lioncash
aef801b5b5
IR: Handle 256-bit VSMin
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Extends VSMin to handle 256-bit vectors.
2022-09-29 20:01:04 +00:00
lioncash
6c9e29796b
IR: Handle 256-bit VUMin
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Extends VUMin to handle 256-bit vectors.
2022-09-29 19:47:47 +00:00
lioncash
364bb3ac1e
IR: Handle 256-bit VNot
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Extends VNot to handle 256-bit vectors.
2022-09-29 14:40:46 +00:00
lioncash
428ea68507
IR: Handle 256-bit VFNeg
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Extends VFNeg to handle 256-bit vectors.
2022-09-29 14:00:52 +00:00
Ryan Houdek
1799d4c675
Merge pull request #2038 from lioncash/vneg
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IR: Handle 256-bit VNeg
2022-09-28 13:16:55 -07:00
Ryan Houdek
808e1c0330
Merge pull request #2029 from lioncash/interp
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Interpreter: Use constant for AVX register size where applicable
2022-09-28 13:16:14 -07:00
Ryan Houdek
dacd96cab5
Merge pull request #2037 from lioncash/vfrsqrt
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IR: Handle 256-bit VFRSqrt
2022-09-28 13:15:50 -07:00
Ryan Houdek
ca4d3bf64d
Merge pull request #2036 from lioncash/vfsqrt
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IR: Handle 256-bit VFSqrt
2022-09-28 13:14:25 -07:00
Ryan Houdek
ea38b043c1
Merge pull request #2035 from lioncash/vfrecp
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IR: Handle 256-bit VFRecp
2022-09-28 13:12:57 -07:00
Ryan Houdek
a39746df2e
Merge pull request #2034 from lioncash/vfmax
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IR: Handle 256-bit VFMax
2022-09-28 13:11:04 -07:00
Ryan Houdek
2367a8e50b
Merge pull request #2033 from lioncash/vfmin
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IR: Handle 256-bit VFMin
2022-09-28 13:10:17 -07:00
Ryan Houdek
cb121d7f17
Merge pull request #2032 from lioncash/vaddp
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IR: Handle 256-bit VAddP
2022-09-28 13:08:40 -07:00
lioncash
ce2286c48b
IR: Handle 256-bit VNeg
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Extends VNeg to handle 256-bit vectors.
2022-09-28 19:25:33 +00:00
lioncash
d5694d6de0
IR: Handle 256-bit VFRSqrt
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Extends VFRSqrt to handle 256-bit vectors.
2022-09-28 19:11:01 +00:00
lioncash
121218aa8a
IR: Handle 256-bit VFSqrt
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Extends VFSqrt to handle 256-bit vectors.
2022-09-28 18:46:43 +00:00
lioncash
6bb53fa758
IR: Handle 256-bit VFRecp
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Extends VFRecp to handle 256-bit vectors.
2022-09-28 18:27:34 +00:00
lioncash
89aa0c5471
IR: Handle 256-bit VFMax
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Extends VFMax to handle 256-bit vectors.
2022-09-28 17:40:16 +00:00
lioncash
53fcbf6afa
IR: Handle 256-bit VFMin
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Extends VFMin to handle 256-bit vectors.
2022-09-28 16:56:22 +00:00
lioncash
2f5643ae6b
Arm64/VectorOps: Amend half-precision case in VFAddP
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Noticed that I forgot to change the Zn register over to VTMP1.
This would have been caught by a vixl internal assert anyway.
Also make the behavior equal with VAddP, where we clear and only copy
over the exact amount of bytes instead of the whole register.
2022-09-28 15:10:49 +00:00
lioncash
d162ac8b3d
IR: Handle 256-bit VAddP
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Extends VAddP to handle 256-bit vectors.
2022-09-28 15:01:31 +00:00
lioncash
c9a704fbde
Interpreter: Handle 256-bit VMov
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Now we'll properly handle the move.
Also put an assert in place to catch any over-sized values.
2022-09-28 13:47:23 +00:00
lioncash
9d5a822a3a
Interpreter: Use constant for AVX register size where applicable
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Makes the previously implemented ops a little more self-documenting,
and, if we ever actually need to change this, there's a nice constant
that can be looked up instead of magic 32 values.
2022-09-28 13:38:03 +00:00
Ryan Houdek
50eba4066a
Merge pull request #2028 from lioncash/vfdiv
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IR: Handle 256-bit VFDiv
2022-09-27 13:39:02 -07:00
lioncash
6116ae5330
IR: Handle 256-bit VFDiv
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Extends VFDiv to handle 256-bit vectors.
2022-09-27 20:20:31 +00:00
Ryan Houdek
447226576f
Merge pull request #2027 from lioncash/vfmul
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IR: Handle 256-bit VFMul
2022-09-27 13:18:38 -07:00
Ryan Houdek
3f8b872f17
Merge pull request #2026 from lioncash/vfsub
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IR: Handle 256-bit VFSub
2022-09-27 13:17:00 -07:00
Ryan Houdek
e573ddc2db
Merge pull request #2025 from lioncash/vfaddp
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IR: Handle 256-bit VFAddP
2022-09-27 12:56:58 -07:00
lioncash
fe9aa681f0
IR: Handle 256-bit VFMul
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Extends VFMul to handle 256-bit vectors.
2022-09-27 19:54:57 +00:00
lioncash