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Author SHA1 Message Date
Ryan Houdek a2307f28d6 Arm64: Optimize AES operations by caching a zero register 
A bunch of the AES operations take a zero register upfront and we
currently materialize it for each instruction.
Considering that most AES operations are used back to back, we can
eliminate these materializations by caching it between instructions.

Additionally removes a move in the optimal case when destination matches
the state register, which is exactly what the SSE operation ends up
doing.

AESKeyGenAssist has an edge case that if the destination RA overlaps the
zero register then we still need to eat a move, hopefully doesn't happen
too frequently in practice. This is also the lesser used instruction so
it isn't a big deal. RA constraints could solve that still.
 2023-08-30 19:00:43 -07:00
Ryan Houdek 1446d4fe12 IR: Adds support for named vector zero 
This is useful for caching a zero register vector which we use in
various locations. This will be abused soon.
 2023-08-30 18:59:38 -07:00
Mai 9fb8c95ef4 Merge pull request #3043 from Sonicadvance1/optimize_blendv 
OpcodeDispatcher: Optimize BLENDV when xmm0 is one of the sources
 2023-08-30 20:36:14 -04:00
Ryan Houdek 58caee3614 InstCountCI: Update for optimized blendv 2023-08-30 17:13:05 -07:00
Ryan Houdek 24215f7ad0 OpcodeDispatcher: Optimize BLENDV when xmm0 is one of the sources 
This instruction has xmm0 be one of the implicit sources. We were
loading xmm0 twice. #2700 would also fix this but that breaks other
things for some reason.
 2023-08-30 17:09:34 -07:00
Ryan Houdek b20c518bf0 OpcodeDispatcher: Optimize calls with push 
InstCountCI doesn't cover branch instructions so needs manual
inspection.
 2023-08-30 16:25:01 -07:00
Ryan Houdek d738538a34 Merge pull request #3041 from Sonicadvance1/telem_runtime 
FEXCore: Allows disabling telemetry at runtime
 2023-08-30 13:30:51 -07:00
Ryan Houdek 48df17b836 InstCountCI: Update for changed tests 
Since the telemetry array is always in the corestate now some numbers
change.
 2023-08-30 13:01:27 -07:00
Ryan Houdek 81a32c3998 FEXCore: Allows disabling telemetry at runtime 
This is useful for InstCountCI so you can disable the telemetry
gathering even if enabled so it doesn't affect the CI system.
 2023-08-30 12:59:41 -07:00
Mai 02b891c0fe Merge pull request #3040 from Sonicadvance1/optimize_aeskeygen 
Arm64: Optimize AESKeyGenAssist
 2023-08-30 15:58:29 -04:00
Mai 012750f2bb Merge pull request #3037 from Sonicadvance1/remove_debug_log 
OpcodeDispatcher: Removes erroneous debug log
 2023-08-30 15:57:31 -04:00
Ryan Houdek b40147a269 InstCountCI: Update for aeskeygenassist 2023-08-30 12:17:07 -07:00
Ryan Houdek d8f131fa3d Arm64: Optimize AESKeyGenAssist 
We can load the swizzle table from our constant pool now. This removes
the only usage of VTMP3 from our Arm64 JIT.

I would say the this is now optimal for the version without RCON set.
With RCON we could technically make some of the move of the constant
more optimal.
 2023-08-30 12:15:09 -07:00
Ryan Houdek 2c2081c977 Merge pull request #3039 from Sonicadvance1/print_OpSize 
IR: Adds printer for OpSize
 2023-08-30 11:50:13 -07:00
Ryan Houdek 572cc57aa3 IR: Adds printer for OpSize 2023-08-30 11:32:43 -07:00
Ryan Houdek 9bfd4b650f OpcodeDispatcher: Removes erroneous debug log 2023-08-30 11:12:12 -07:00
Ryan Houdek e1c2033fa9 Merge pull request #3036 from Sonicadvance1/OpSize_IRDump_Parse 
IR: Adds IR::OpSize to IRDumper
 2023-08-30 11:01:06 -07:00
Ryan Houdek d3ee794dcb IR: Adds IR::OpSize to IRDumper 
This was missing before.
 2023-08-30 10:43:23 -07:00
Mai b40f784da0 Merge pull request #3034 from Sonicadvance1/remove_implicit_add 
IR: Removes implicit sized add
 2023-08-30 08:50:49 -04:00
Ryan Houdek f741ebf970 IR: Removes implicit sized add 
Saw a few locations in here that we operate things at 64-bit
unconditionally around pointer calculation. Will be coming back for
those when running in 32-bit mode.

This is the last of the implicit sized ALU operations! After this I'll
be going through the IR more individually to try and remove any
stragglers.
Then should be able to start cleaning up and actually optimizing GPR
operations.
 2023-08-29 22:26:51 -07:00
Mai 351c0eee42 Merge pull request #3033 from Sonicadvance1/remove_implicit_bfe 
IR: Removes implicit sized bfe
 2023-08-29 23:02:02 -04:00
Ryan Houdek e8b767b553 IR: Removes implicit sized bfe 
This one is a bit of a mess, looking forward to coming back and cleaning
this up.
 2023-08-29 19:43:39 -07:00
Mai 8239f8aa27 Merge pull request #3031 from Sonicadvance1/remove_implicit_and 
IR: Removes implicit sized and
 2023-08-29 02:32:40 -04:00
Ryan Houdek 9e70aa4192 IR: Removes implicit sized and 2023-08-28 22:43:21 -07:00
Ryan Houdek 59a4d15907 Merge pull request #3030 from Sonicadvance1/remove_implicit_sub 
IR: Removes implicit sized sub
 2023-08-28 22:20:30 -07:00
Ryan Houdek b5dc6a69c7 IR: Removes implicit sized sub 2023-08-28 22:05:02 -07:00
Mai 227ba9f9fc Merge pull request #3029 from Sonicadvance1/remove_variable_bfi 
IR: Removes bfi from variable size
 2023-08-29 00:50:45 -04:00
Ryan Houdek a276b37252 IR: Removes bfi from variable size 
This one was already explicit sized. Just convert it over to OpSize.
 2023-08-28 21:31:37 -07:00
Mai 9b55a34e75 Merge pull request #3028 from Sonicadvance1/remove_implicit_xor 
IR: Removes implicit sized xor
 2023-08-28 23:59:39 -04:00
Ryan Houdek 8bc84c202c IR: Removes implicit sized xor 2023-08-28 19:51:14 -07:00
Ryan Houdek e9a3848602 Merge pull request #3027 from Sonicadvance1/remove_implicit_andn 
IR: Removes implicit sized andn
 2023-08-28 19:39:49 -07:00
Ryan Houdek 516f27bff5 Merge pull request #3026 from Sonicadvance1/remove_implicit_or 
IR: Removes implicit sized or
 2023-08-28 19:39:42 -07:00
Ryan Houdek 1699ec9a76 IR: Removes implicit sized andn 2023-08-28 19:16:16 -07:00
Ryan Houdek db6c8852fc IR: Removes implicit sized or 2023-08-28 19:06:05 -07:00
Ryan Houdek 24a9254e37 Merge pull request #3025 from Sonicadvance1/remove_implicit_lshr 
IR: Removes implicit sized lshr
 2023-08-28 19:05:47 -07:00
Ryan Houdek 65dc6f3e90 IR: Removes implicit sized lshr 2023-08-28 18:16:56 -07:00
Mai 8534d3dfbf Merge pull request #3024 from Sonicadvance1/remove_implicit_lshl 
IR: Removes implicit sized lshl
 2023-08-28 21:08:05 -04:00
Ryan Houdek 60c4438780 IR: Removes implicit sized lshl 2023-08-28 17:50:41 -07:00
Ryan Houdek 915e52046c Merge pull request #3023 from Sonicadvance1/remove_mul 
IR: Removes implicit sized mul ops
 2023-08-28 17:49:32 -07:00
Ryan Houdek 898ce1ce8f IR: Removes implicit sized UMulH 2023-08-28 17:20:55 -07:00
Ryan Houdek aa8dfd6af1 IR: Removes implicit sized UMul 2023-08-28 17:20:55 -07:00
Ryan Houdek 6a6d808b0d IR: Removes implicit sized MulH 2023-08-28 17:20:55 -07:00
Ryan Houdek fac5b2ac72 IR: Removes implicit sized Mul 2023-08-28 17:20:55 -07:00
Ryan Houdek a55616e4db Merge pull request #3022 from Sonicadvance1/remove_sext 
IR: Removes sext IR helper
 2023-08-28 17:20:39 -07:00
Ryan Houdek b9e4a1423f IR: Removes sext IR helper 
You hold no power here IR operation.
 2023-08-28 17:03:38 -07:00
Ryan Houdek 6f661534a2 Merge pull request #3021 from Sonicadvance1/remove_implicit_op_part_move 
IR: Removes implicit sized {Create,Extract}ElementPair
 2023-08-28 17:03:12 -07:00
Ryan Houdek c0bb6a053f IR: Removes implicit sized {Create,Extract}ElementPair 2023-08-28 16:50:00 -07:00
Ryan Houdek bc1e89d91d Merge pull request #3020 from Sonicadvance1/remove_implicit_ops_pt_atomic 
Remove implicit sized IR ops part atomic
 2023-08-28 07:27:47 -07:00
Ryan Houdek c1b4c11e54 Merge pull request #3018 from Sonicadvance1/opcodedispatcher_sizeopt 
OpcodeDispatcher: Optimize Get{Src,Dst}Size
 2023-08-28 07:13:41 -07:00
Ryan Houdek a36427d01e IR: Removes implicit sized CAS 2023-08-28 07:12:31 -07:00