steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-27 21:01:06 +01:00
Code Issues Packages Projects Releases 67 Wiki Activity
9,533 Commits 11 Branches 71 Tags
c28824f94de6cb3e83becbbcd9473cfc9d2bfd22
Commit Graph
9533 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
Ryan Houdek 8f7925d06f Arm64: Simple typo fix 2023-08-26 18:22:50 -07:00
Ryan Houdek eace648fa9 OpcodeDispatcher: Fixes bug in UMUL 
This was trying to operating on a 32-bit value but BFE the upper
32-bits.

Actually fixes this so it is operating on the 64-bit multiply result.
 2023-08-26 18:22:50 -07:00
Ryan Houdek a4ac21a4e4 OpcodeDispatcher: Fixes bug in GetRFLAG with CachedNZCV 
This was only operating at byte size but it was attempting to get bit
offsets at greater than operating size.
Change operating size over to 64-bit.
 2023-08-26 18:22:50 -07:00
Ryan Houdek a01e69092d Arm64: Ensure Bfe and Sbfe operate at 32-bit or 64-bit op size 
For Sbfe at least it ensures the upper bits don't get filled with
garbage.
Bfe it doesn't change behaviour but best to be correct.
 2023-08-26 18:22:50 -07:00
Ryan Houdek 2fde2140ef Arm64: Ensure assert is testing correct array 2023-08-26 18:22:50 -07:00
Ryan Houdek 547daf8b6e Merge pull request #2857 from Sonicadvance1/fix_ra_validation 
IR: Fixes RAValidation for 32-bit applications
 2023-08-26 18:22:18 -07:00
Ryan Houdek e10afefb2b IR: Fixes RAValidation for 32-bit applications 
RAValidation was making an assumption that GPR register class would only
have up to 16 registers for either SRA or dynamic registers.

When running a 32-bit application we allow 17 GPRs to be dynamically
allocated, since we can take 8 back from SRA in that case.

Just split the two classes in the RAValidation pass since they will
never overlap their allocation.

Fixes validation in `32Bit_Secondary/15_XX_0.asm` locally that changed
behaviour due to tinkering.
 2023-08-26 16:18:03 -07:00
Mai 0195bb6e5a Merge pull request #3010 from Sonicadvance1/exit_group_quit 
Linux: Call exit_group when application tries
 2023-08-25 21:13:59 -04:00
Ryan Houdek edd27a2723 Linux: Call exit_group when application tries 
When the application calls exit_group we no longer need to care about
cleanup because the entire process group is leaving.

Just immediately call exit group and get out. Might revisit this in the
future.

Fixes #2752
 2023-08-25 17:41:57 -07:00
Mai 7c6660f634 Merge pull request #3009 from Sonicadvance1/fix_frint64 
X8764: Ensure frndint uses host rounding mode
 2023-08-25 20:01:01 -04:00
Ryan Houdek 9ba46f429e X8764: Ensure frndint uses host rounding mode 
This previously used `Round_Nearest` which had a bug on Arm64 that it
actually was always using `Round_Host` aka frinti.
Ever since 393cea2e8ba47a15a3ce31d07a6088a2ff91653c[1] this has been fixed
so that `Round_Nearest` actually uses frintn for neaest.

This instruction actually wants to use the host rounding mode.
Once issue with this is that x87 and SSE have different rounding mode
flags and currently we conflate the two in our JIT. This will need to be
fixed in the future.

In the meantime this restores behaviour that it actually uses the host
rounding mode, which fixes black screen and broken vertices in Grim
Fandango Remastered.

[1] e89321dc60 for scalar.
 2023-08-25 16:04:01 -07:00
Mai db3dc3edf4 Merge pull request #3003 from Sonicadvance1/optimize_pshuf 
OpcodeDispatcher: Optimize PSHUF{LW, HW, D}!
 2023-08-25 16:36:52 -04:00
Ryan Houdek c26798af83 InstCountCI: Update for shuffles! 2023-08-25 12:59:40 -07:00
Ryan Houdek a76c2c57b0 OpcodeDispatcher: Optimize PSHUF{LW, HW, D}! 
This is way more optimal!
 2023-08-25 12:59:40 -07:00
Ryan Houdek 7f63d87295 IR: Adds support for new LoadNamedVectorIndexedConstant IR 2023-08-25 12:59:40 -07:00
Mai bf12f08218 Merge pull request #3002 from Sonicadvance1/optimize_movmaskpd 
OpcodeDispatcher: Optimize 128-bit movmaskpd
 2023-08-25 08:50:28 -04:00
Mai 1f7d138d2a Merge pull request #3008 from Sonicadvance1/optimize_movddup 
OpcodeDispatcher: Optimize movddup from register
 2023-08-25 08:48:40 -04:00
Mai f36f07055a Merge pull request #3007 from Sonicadvance1/optimize_cvtdq2pd 
OpcodeDispatcher: Optimize cvtdq2pd from register source
 2023-08-25 08:47:47 -04:00
Mai 30a1a382c4 Merge pull request #3006 from Sonicadvance1/optimize_movq 
OpcodeDispatcher: Optimizes movq
 2023-08-25 08:46:02 -04:00
Mai 631655dd81 Merge pull request #3005 from Sonicadvance1/nontemporalmoves 
OpcodeDispatcher: Optimize nontemporal moves
 2023-08-25 08:44:48 -04:00
Mai 0ef439f830 Merge pull request #3004 from Sonicadvance1/optimize_scalar_cvt 
OpcodeDispatcher: Generate more optimal code for scalar GPR converts
 2023-08-25 08:43:56 -04:00
Ryan Houdek 2aba628a24 InstCountCI: Update for movddup optimization 2023-08-25 03:44:30 -07:00
Ryan Houdek 2fbcf2e4a9 OpcodeDispatcher: Optimize movddup from register 
This is now optimal
 2023-08-25 03:44:10 -07:00
Ryan Houdek 7367f166b0 InstCountCI: Update for cvtdq2pd optimization 2023-08-25 03:39:45 -07:00
Ryan Houdek 00124205e5 OpcodeDispatcher: Optimize cvtdq2pd from register source 
This is now optimal
 2023-08-25 03:39:24 -07:00
Ryan Houdek 1a3a59dd38 InstCountCI: Update for movq optimization 2023-08-25 03:30:52 -07:00
Ryan Houdek 81281e2115 OpcodeDispatcher: Optimizes movq 
Removes a redundant move between registers and makes it optimal.
Also removes a couple redundant moves on the avx version.
 2023-08-25 03:29:58 -07:00
Ryan Houdek a901e5f3df InstCountCI: Update for optimized cvtsi2s{s,d} 2023-08-25 03:19:11 -07:00
Ryan Houdek 1cb2b084b3 OpcodeDispatcher: Generate more optimal code for scalar GPR converts 
1) In the case that we are converted a GPR, don't zero extend it first.
2) In the case that the scalar comes from memory, load it first in an
   FPR and converted it in-place.

These are now optimal in the case of AFP is unsupported.
 2023-08-25 03:19:11 -07:00
Ryan Houdek 189b0da68f JIT/Int: Add support for scalar conversion as well 2023-08-25 03:19:11 -07:00
Ryan Houdek 9fa877e512 InstCountCI: Update for move temporal optimization 2023-08-25 03:13:28 -07:00
Ryan Houdek f3679a99ec OpcodeDispatcher: Optimize nontemporal moves 
These are now optimal.
 2023-08-25 03:13:10 -07:00
Ryan Houdek 62156f2152 ARM64JIT: Adds support for scalar cvt 2023-08-25 02:34:30 -07:00
Ryan Houdek 3808f97283 InstCountCI: Update for movmaskpd optimization 2023-08-24 17:27:54 -07:00
Ryan Houdek 3a6d25f56a unittests/ASM: Update movmskpd test to include an edge of garbage but no sign bit 2023-08-24 17:27:54 -07:00
Ryan Houdek 9a54898429 OpcodeDispatcher: Optimize 128-bit movmaskpd 
I'd consider this optimal now.

Thanks to @dougallj for the optimization idea again!
 2023-08-24 17:27:54 -07:00
Ryan Houdek 80d871fb18 Merge pull request #3001 from Sonicadvance1/optimize_cvtps2pd 
OpcodeDispatcher: Optimize cvtps2pd
 2023-08-24 16:09:12 -07:00
Ryan Houdek 4d58ec1025 Merge pull request #3000 from Sonicadvance1/optimize_cvt 
OpcodeDispatcher: Optimize MMX conversion operation
 2023-08-24 16:09:04 -07:00
Ryan Houdek 60ad76732a InstCountCI: Update for cvtps2pd optimization 2023-08-24 15:56:02 -07:00
Ryan Houdek 3731e6d88b OpcodeDispatcher: Optimize cvtps2pd 
SSE version is now optimal and AVX version gets rid of a redundant move.
 2023-08-24 15:55:11 -07:00
Ryan Houdek e3812f9c3c InstCountCI: Update tests for mmx optimization 2023-08-24 15:46:54 -07:00
Ryan Houdek c441b238c7 OpcodeDispatcher: Optimize MMX conversion operation 
These instructions are now optimal
 2023-08-24 15:46:19 -07:00
Ryan Houdek 72ce7ddf2d Arm64: Optimize CVT operations for 64-bit variants 
Using 128-bit converts for 64-bit versions cuts their throughput in half
on Cortex. Ensure we use the 64-bit version when possible.
 2023-08-24 15:45:07 -07:00
Ryan Houdek e025d32531 Merge pull request #2999 from lioncash/catch 
Externals: Update Catch2 to v2.13.10
 2023-08-24 15:19:23 -07:00
Ryan Houdek 200dbdd0e6 Merge pull request #2998 from Sonicadvance1/optimize_addsub_fcma 
OpcodeDispatcher: Optimize addsubp{s,d} using fcadd
 2023-08-24 15:19:06 -07:00
Lioncache 989fe22e2d Externals: Update Catch2 to v2.13.10 
Updates it to the latest v2 branch tag
 2023-08-24 18:04:59 -04:00
Ryan Houdek 4e7adeec85 InstCountCI: Adds new files for FCMA 2023-08-24 15:00:42 -07:00
Ryan Houdek a1210f892a OpcodeDispatcher: Optimize addsubp{s,d} using fcadd 
This extension was added with seemingly Cortex-A710 and turns this
instruction in to two instructions which is quite good.

Needs #2994 merged first.

Huge thanks to @dougallj for the optimization idea!
 2023-08-24 15:00:41 -07:00
Ryan Houdek ba01eac467 IR: Adds support for ARM's FCMA FCADD instruction 2023-08-24 15:00:41 -07:00
Ryan Houdek c5d147322f HostFeatures: Adds support for FCMA 2023-08-24 15:00:41 -07:00