Ryan Houdek
ee8dfb8fc5
Merge pull request #606 from duck-37/sigsegv-fail-tests
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Have tests that throw a non-HLT SIGSEGV fail
2021-01-06 15:28:38 -08:00
duck
6388151fc0
Oops.
2021-01-06 18:12:09 -05:00
duck
ffc4996ca6
DidFail -> DidFault
2021-01-06 18:11:23 -05:00
Stefanos Kornilios Mitsis Poiitidis
6fefefbe0e
Merge pull request #524 from FEX-Emu/skmp/static-ra
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SRA: Static Register Allocation
2021-01-07 01:05:01 +02:00
Stefanos Kornilios Mitsis Poiitidis
dd71a45175
Merge branch 'main' into skmp/static-ra
2021-01-07 01:04:16 +02:00
Ryan Houdek
46c85b8fad
Merge pull request #496 from FEX-Emu/skmp/blockcache-l1c
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BlockCache: Add a cache for faster lookups
2021-01-06 14:35:25 -08:00
Stefanos Kornilios Mitsis Poiitidis
5600ffbb4b
L1C: Use constant for masking
2021-01-07 00:27:08 +02:00
Stefanos Kornilios Mitsis Poiitidis
aaa80d0678
BlockCache: Add a hash based L1 cache for lookups
2021-01-06 23:37:25 +02:00
Stefanos Kornilios Mitsis Poiitidis
101b29c5ee
ConstProp: Fix build breakage w/ operator ==
2021-01-06 23:31:50 +02:00
duck
f9cd0f0179
Have tests that throw a non-HLT SIGSEGV fail
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Patch moves HandleSIGSEGV in HostFactory.cpp to a non-frontend host signal handler, then registers its own frontend signal handler to catch unhandled segfaults.
2021-01-06 05:07:47 -05:00
Stefanos Kornilios Mitsis Poiitidis
45b6c39e2c
SRA: reload SRA on signal handler entry, recover from guest on context marshaling
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
86f74279e6
arm64: Fix SRA spills, OP_SYSCALL stack args
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
fa35e79c3f
arm64: Fix lr pushing
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
bcf382afc4
Interpreter: Fix LSHR to correctly zero extend
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
193a72aa56
SRA: Address review feedback
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
94fb009f4b
SRA: Address review feedback
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
5fd77f8228
arm64: Fix FPR spilling
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
41285865ba
arm64: Fix asserts
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
81756b2346
IR: Add opreator != for NodeWrapperBase
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
c95d40e9be
arm64: Spill/Fill static ra around OP_SYSCALL
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
82545796b8
static-ra: Use LogMan::* instead of assert/printf
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
2ed8163a98
arm64: Cleanup & optimize Static and Dynamic spills on call
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
b3600a453c
RA/SRA: Don't read-alias not full sized regs, it is not safe
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
30d7c02b60
arm64: Really fix Popcount to take into account opsize
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
5f481ff56d
IR: Fix Ashr, Ror OpSize calculation
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
c518151800
IR: Fix Lshr op size detection
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
20a9b93019
OpDisp: Fix CondJUMPRCXOp
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
76367f0afc
arm64: Remove some debug logic
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
c20b27965d
arm64: Fix Popcount to take into account opsize
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
6e053f0055
arm64: Fix IsGPR && IsFPR for SRA
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
80d1766bf0
arm64: Correctly handle signal and SRA interactions
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
a1f7c7da55
arm64: Fix Exit handler calling from signal
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
de0ed19e86
Arm64: Fix build for CreateRegPair
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
cdb2075522
X64: Fix RegisterClasses Count
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
5a3c55f621
RA: Fix Class Conflicts
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
204fda62f1
IR: Fix CreateElementPair edge cases, Remove Load/StoreContextPair
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
fbe87101db
IR: Remove Load/StoreContextPair
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
17dc0bfcd8
SRA: Only do read-alias if accessing low part of register
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
c67aa0b83d
OpDisp: Don't use LoadContextPair, it is kludgy and breaks SRA
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
9c5a1fd5ea
SRA: Static Register Allocation, arm64 only
2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis
fbda0e7ba5
Merge pull request #605 from FEX-Emu/skmp/rename-master-main
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CI: rename master to main
2021-01-05 17:14:41 +02:00
Stefanos Kornilios Mitsis Poiitidis
b587a0c4d9
CI: rename master to main
2021-01-05 16:11:04 +02:00
Stefanos Kornilios Mitsis Poiitidis
f724392ef8
Merge pull request #601 from Sonicadvance1/fix_cvtsi2ss_64bit
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Adds support for proper sized GPR->FPR sized conversions
2021-01-05 12:03:33 +02:00
Stefanos Kornilios Mitsis Poiitidis
f6112c6ee2
Merge pull request #597 from Sonicadvance1/prefetch
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Implements the rest of the prefetch ops and nops
2021-01-05 11:49:39 +02:00
Ryan Houdek
05ee4e6d7a
Adds cvtsi2ss unit test to ensure proper 64bit->float conversion
2020-12-30 10:07:12 -08:00
Ryan Houdek
4907bda639
Adds support for proper sized GPR->FPR sized conversions
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Both x86 and AArch64 support converting from one sized GPR to another
sized FPR. Expose it in our IR op.
Fixes a bug in CVTSI2SS with a 64bit source and it was treating the
input source as a 32bit value.
eg:
0x0000'0000'FFFF'FFFF was treated as converting to -1 float, which was wrong since it is a 64bit value
2020-12-30 10:07:12 -08:00
Ryan Houdek
5a068c1679
Implements a unit test that just spins through all the prefetch encodings
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Hits the reserved ops as well since these are architectually defined to
be forward compatible as prefetch and will behave as a prefetch or as a
NOP depending.
2020-12-27 19:10:49 -08:00
Ryan Houdek
8bd76885ea
Implements the rest of the prefetch ops and nops
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Prefetch is highly architecture specific and a lot of these don't
actually map 1:1 with AArch64 anyway.
Just nop out
2020-12-27 19:10:41 -08:00
Stefanos Kornilios Mitsis Poiitidis
e442e43295
Merge pull request #589 from Sonicadvance1/remove_dead_handlers
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Removes dead HandleSyscall function
2020-12-25 15:15:51 +02:00
Stefanos Kornilios Mitsis Poiitidis
3cfae8ab30
Merge pull request #588 from Sonicadvance1/32bit_table_fixes
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Fixes some tables definitions for 32bit
2020-12-25 15:15:36 +02:00
