Ryan Houdek
|
fc093531c3
|
Fixes SHRD and SHRD by zero with 32bit source register
This will still zext the GPR with zero shift, just won't update the
flags
|
2020-09-28 16:58:26 -07:00 |
|
Ryan Houdek
|
912b6fb0f3
|
Merge pull request #442 from Sonicadvance1/ashr_fix
Fixes smaller than 32bit ASHR
|
2020-09-28 13:44:07 -07:00 |
|
Ryan Houdek
|
eedc4b0af2
|
Merge pull request #438 from Sonicadvance1/psadw
Fixes PSADBW
|
2020-09-28 13:43:59 -07:00 |
|
Ryan Houdek
|
e4ab241fa2
|
Adds a new ASHR unit test
Finds some edge case behaviour in it
|
2020-09-27 23:13:10 -07:00 |
|
Ryan Houdek
|
f6c207b5c5
|
Fixes smaller than 32bit ASHR
Need to operate on it as a 32bit value
|
2020-09-27 23:11:58 -07:00 |
|
Ryan Houdek
|
b878006f18
|
Extends the PSADBW unit tests
Weren't quite extensive enough
|
2020-09-27 16:54:57 -07:00 |
|
Ryan Houdek
|
d404da1bf1
|
Fixes PSADBW in the opdispatcher
Documentation in the x86 manuals implied operating at 8bit
|
2020-09-27 16:53:50 -07:00 |
|
Ryan Houdek
|
b0b3335178
|
Fixes VADDV in the x86_64 JIT
|
2020-09-27 16:53:25 -07:00 |
|
Ryan Houdek
|
a919e532fc
|
Merge pull request #437 from Sonicadvance1/ssse3
Enables SSSE3 in CPUID
|
2020-09-27 11:15:15 -07:00 |
|
Ryan Houdek
|
eac9cf0328
|
Merge pull request #436 from Sonicadvance1/phaddsubs
Implements PHADDSW and PHSUBSW
|
2020-09-27 11:11:46 -07:00 |
|
Ryan Houdek
|
1cf027db19
|
Implements PHADDSW and PHSUBSW unit tests
Both the MMX and XMM variants
|
2020-09-27 11:08:21 -07:00 |
|
Ryan Houdek
|
603580f291
|
Implements PHADDSW and PHSUBSW in the opdispatcher
Both the MMX and XMM variants
|
2020-09-27 11:08:21 -07:00 |
|
Ryan Houdek
|
a75e01efda
|
Merge pull request #435 from Sonicadvance1/pmaddubsw
Implements PMADDUBSW
|
2020-09-27 10:54:44 -07:00 |
|
Ryan Houdek
|
5ebc3b5ac7
|
Implements PMADDUBSW unit tests
Both MMX and XMM variants
|
2020-09-27 10:50:35 -07:00 |
|
Ryan Houdek
|
b409855605
|
Implements PMADDUBSW in the Opdispatcher
This is some weirdly specific instruction
|
2020-09-27 10:50:35 -07:00 |
|
Ryan Houdek
|
1c2f8dece5
|
Fixes typo in x86 VUXTL2
This was supposed to shift right, not shift left
This IR op wasn't being used so it went unnoticed
|
2020-09-27 10:38:46 -07:00 |
|
Ryan Houdek
|
badc7f6562
|
Merge pull request #434 from Sonicadvance1/pmulhrsw
Implements SSSE3 PMULHRSW
|
2020-09-27 10:38:14 -07:00 |
|
Ryan Houdek
|
310742199d
|
Merge pull request #433 from Sonicadvance1/phadd
Implements PHADD and PHSUB
|
2020-09-27 10:37:03 -07:00 |
|
Ryan Houdek
|
ce16ce887b
|
Implements PHADD/PHSUB XMM unit tests
|
2020-09-27 10:32:13 -07:00 |
|
Ryan Houdek
|
5547b3aa92
|
Implements PHADD/PHSUB MMX unit tests
|
2020-09-27 10:32:13 -07:00 |
|
Ryan Houdek
|
6b3e1bd75b
|
Implements PHADD and PHSUB in the OpDispatcher
|
2020-09-27 10:32:10 -07:00 |
|
Ryan Houdek
|
72d0dd30a6
|
Fixes 8byte register VAddP in the x86 JIT
|
2020-09-27 10:31:35 -07:00 |
|
Ryan Houdek
|
4f73897a7f
|
Fixes 8byte register VaddP on AArch64 JIT
|
2020-09-27 10:31:35 -07:00 |
|
Stefanos Kornilios Mitsis Poiitidis
|
cdd28f9ada
|
Merge pull request #432 from Sonicadvance1/pshufb
Implements PSHUFB
|
2020-09-27 14:16:50 +03:00 |
|
Ryan Houdek
|
afa4f0df38
|
Enables SSSE3 in CPUID
|
2020-09-26 20:40:22 -07:00 |
|
Ryan Houdek
|
7b5892b0d5
|
Implements PMULHRSW unit test
|
2020-09-26 15:33:19 -07:00 |
|
Ryan Houdek
|
da16b40e12
|
Implements PMULHRSW in the opdispatcher
Both the MMX and XMM versions
|
2020-09-26 15:32:21 -07:00 |
|
Ryan Houdek
|
315e909ed0
|
Implements new VectorImm in the x86 JIT
|
2020-09-26 15:31:18 -07:00 |
|
Ryan Houdek
|
b30e517a0b
|
Implements new VectorImm op in the AArch64 JIT
|
2020-09-26 15:31:05 -07:00 |
|
Ryan Houdek
|
820c10b439
|
Implements new VectorImm op in the interpreter
|
2020-09-26 15:30:43 -07:00 |
|
Ryan Houdek
|
62158d4f8c
|
Implements new VectorImm IR op
|
2020-09-26 15:30:20 -07:00 |
|
Ryan Houdek
|
b38f0a8043
|
Implements XMM pshufb unit test
|
2020-09-26 13:08:31 -07:00 |
|
Ryan Houdek
|
93b9340ed7
|
Implements MMX pshufb unit test
|
2020-09-26 13:08:31 -07:00 |
|
Ryan Houdek
|
58425637e2
|
Implements pshufb in the opdispatcher
This hits both the MMX and XMM variants
|
2020-09-26 13:08:31 -07:00 |
|
Ryan Houdek
|
91229c8ea2
|
Implements new VTBL1 IR op in x86 JIT
|
2020-09-26 12:59:34 -07:00 |
|
Ryan Houdek
|
59bffc7431
|
Implements new VTBL1 instruction in AArch64 JIT
|
2020-09-26 12:59:34 -07:00 |
|
Ryan Houdek
|
a5f6a5b26e
|
Implements new VTBL1 op in the interpreter
|
2020-09-26 12:59:34 -07:00 |
|
Ryan Houdek
|
83ac23be21
|
Implements new VTBL1 IR op
This perfectly matches the AArch64 variant and almost perfectly matches
x86's pshufb instruction
|
2020-09-26 12:59:34 -07:00 |
|
Ryan Houdek
|
e1560bd68b
|
Merge pull request #431 from Sonicadvance1/palignr
Implements MMX register based palignr
|
2020-09-26 12:59:10 -07:00 |
|
Ryan Houdek
|
3465021721
|
Implements a MMX palignr unit test
|
2020-09-26 12:53:51 -07:00 |
|
Ryan Houdek
|
55077cfa55
|
Implements MMX register based palignr
We had already implemented the XMM variant
|
2020-09-26 12:53:51 -07:00 |
|
Ryan Houdek
|
9cdd0c4776
|
Fixes an edge case in our palignr implementation
When the shift amount is greater than the size of both the registers
then it'll set the resulting register to zero
|
2020-09-26 12:53:51 -07:00 |
|
Ryan Houdek
|
12a4dd6d2d
|
Fixes VExtr in the ARM64 JIT for 8byte registers
We only expected 16byte registers before
|
2020-09-26 12:52:26 -07:00 |
|
Ryan Houdek
|
bd37d007c9
|
Fixes 64bit register usage in VExtr on x86_64
We would need to fall back to MMX if we wanted to handle that cleanly
there.
Just emulate instead of using MMX
|
2020-09-26 12:52:26 -07:00 |
|
Ryan Houdek
|
a11aed2f47
|
Removes some undefined behaviour in the interpreter VExtr implementation
|
2020-09-26 12:52:26 -07:00 |
|
Ryan Houdek
|
ddd7b8f406
|
Adds a mixxing VXor op to the IREmitter helper
|
2020-09-26 12:52:26 -07:00 |
|
Ryan Houdek
|
5b96dd04f0
|
Updates XMM PAlignr test to test more cases
One larger than the first register, then another that would zero
everything
|
2020-09-26 12:52:02 -07:00 |
|
Ryan Houdek
|
d8d50e8200
|
Merge pull request #430 from Sonicadvance1/pabs
Implements support for SSSE3 PABS{B,W,D}
|
2020-09-26 12:51:10 -07:00 |
|
Ryan Houdek
|
e09a9fb651
|
Adds XMM register PABS unit tests
verified with host runner
|
2020-09-26 12:47:01 -07:00 |
|
Ryan Houdek
|
854c2f259a
|
Adds MMX register PABS unit tests
verified with host runner
|
2020-09-26 12:47:01 -07:00 |
|