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2bc7c28a9cdaa7b3a6ee39aa60742439fe179a5d
FEX-Emu--FEX/External/FEXCore/Source/Interface
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Ryan Houdek 2bc7c28a9c Fixes AArch64 ROL implementation 
In the case that RA does Dst = Src[1] then we would have overwrote our
shift value. Move the negation to the top of the 8bit and 16bit ROL to
make sure that doesn't happen
2020-03-20 18:58:39 -07:00
..
Config
FEXCore: Move to Externals/FEXCore
2020-03-06 09:07:37 +02:00
Context
FEXCore: Move to Externals/FEXCore
2020-03-06 09:07:37 +02:00
Core
Fixes AArch64 ROL implementation
2020-03-20 18:58:39 -07:00
HLE
FEXCore: Move to Externals/FEXCore
2020-03-06 09:07:37 +02:00
IR
Implements two new IR Op codes
2020-03-17 13:49:47 -07:00
Memory
FEXCore: Move to Externals/FEXCore
2020-03-06 09:07:37 +02:00