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Ryan Houdek
67f13ba927
Doesn't quite match the libc code directly because it uses `[gs:eax]` with both having the sign bit set and we can't deal with that with ASM tests. So match the behaviour in a different way.
31 lines
535 B
NASM
31 lines
535 B
NASM
%ifdef CONFIG
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{
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"RegData": {
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"RAX": "0x41424344",
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"RBX": "0x41424344"
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},
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"MemoryRegions": {
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"0xf0000000": "4096"
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},
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"MemoryData": {
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"0xf0000000": "0x41424344"
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},
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"Mode": "32BIT"
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}
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%endif
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; Ensures that zero extension of addresses are adhered to.
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lea eax, [0xf000_0000]
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mov eax, [ds:eax]
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; Ensures that zext occurs correctly with two registers that have the sign bit set.
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mov ebx, 0xffff_ffff
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mov ecx, 0xf000_0001
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; Break the block so it can't optimize through.
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jmp .test
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.test:
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mov ebx, [ebx+ecx]
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hlt
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