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FEX-Emu--FEX/External/FEXCore/Source/Interface/Core
Ryan Houdek e0461497a0 ARM64: Optimize vector zeroing
`eor <reg>, <reg>, <reg>` is not the optimal way to zero a vector
register on ARM CPUs. Instead we should move by constant or zero
register to take advantage of zero-latency moves.
2023-08-08 22:24:11 -07:00
..
2023-08-08 22:24:11 -07:00
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2020-03-06 09:07:37 +02:00
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