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OpcodeDispatcher: Optimize movddup from register

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This is now optimal
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Ryan Houdek committed 2023-08-25 03:44:10 -07:00
1 parent 80d871fb18
commit 2fbcf2e4a9
1 file changed
+5 -1
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FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
+5 -1
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@@ -1812,7 +1812,11 @@ void OpDispatchBuilder::VPSRLVOp(OpcodeArgs) {
}
void OpDispatchBuilder::MOVDDUPOp(OpcodeArgs) {
OrderedNode *Src = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags, -1);
// If loading a vector, use the full size, so we don't
// unnecessarily zero extend the vector. Otherwise, if
// memory, then we want to load the element size exactly.
const auto SrcSize = Op->Src[0].IsGPR() ? 16U : GetSrcSize(Op);
OrderedNode *Src = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], SrcSize, Op->Flags, -1);
OrderedNode *Res = _VDupElement(16, GetSrcSize(Op), Src, 0);
StoreResult(FPRClass, Op, Res, -1);