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Merge pull request #6052 from Sonicadvance1/283

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HostFeatures: Make a stronger distinction between CPU features and Process features
This commit is contained in:
Ryan Houdek authored and GitHub committed 2026-10-21 16:57:04 -07:00
2 parents 89713ba3c0 888bd7f55d
commit 4e2b509a42
121 files changed
+200 -180
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FEXCore/Source/Interface/Core/DiskCache.cpp
+6 -5
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@@ -409,17 +409,18 @@ namespace DiskCache {
uint64_t HostFeaturesHash;
} MachineBucketData = {FormatVersion, HostFeatureHash.HostFeaturesHash};
fextl::vector<uint8_t> BucketBytes(sizeof(MachineBucketData) + (sizeof(uint8_t) * 2) + SerializedConfig.size());
fextl::vector<uint8_t> BucketBytes(sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size());
memcpy(BucketBytes.data(), &MachineBucketData, sizeof(MachineBucketData));
// 64-bit mode and HostType is in the ProcessBucket hash only instead of the MachineBucketHash
// These effect code-gen, but they aren't part of the MachineBucketHash, as it comes from Process state.
BucketBytes[sizeof(MachineBucketData)] = CTX->Config.Is64BitMode;
BucketBytes[sizeof(MachineBucketData) + 1] = FEXCore::ToUnderlying(HostFeatureHash.HostType);
memcpy(BucketBytes.data() + sizeof(MachineBucketData) + 2, SerializedConfig.data(), SerializedConfig.size());
memcpy(&BucketBytes[sizeof(MachineBucketData)], &HostFeatureHash.ProcessFeaturesHash, sizeof(HostFeatureHash.ProcessFeaturesHash));
memcpy(BucketBytes.data() + sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash), SerializedConfig.data(),
SerializedConfig.size());
uint64_t MachineBucketHash = XXH3_64bits(BucketBytes.data(), sizeof(MachineBucketData));
uint64_t ProcessBucketHash = XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), 2 + SerializedConfig.size());
uint64_t ProcessBucketHash =
XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size());
BucketHash.high64 = MachineBucketHash;
BucketHash.low64 = ProcessBucketHash;
FEXCore/Source/Interface/Core/DiskCache.h
+1 -1
View File
@@ -249,7 +249,7 @@ namespace DiskCache {
// The current version of the diskcache.
// This must be changed any time codegen changes occur!
// Be aware of the impact of changing this frequently!
static constexpr uint16_t FormatVersion = 34;
static constexpr uint16_t FormatVersion = 35;
static constexpr uint32_t LOOKUP_KEY_MAX_BUCKET_DEPTH = 500;
FEXCore/Source/Interface/Core/Frontend.cpp
+2 -2
View File
@@ -1352,8 +1352,8 @@ const Decoder::DecodeStream Decoder::AdjustAddrForSpecialRegion(const uint8_t* _
constexpr uint64_t VSyscall_Base = 0xFFFF'FFFF'FF60'0000ULL;
constexpr uint64_t VSyscall_End = VSyscall_Base + 0x1000;
if (BlockInfo.Is64BitMode && CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux && RIP >= VSyscall_Base &&
RIP < VSyscall_End) {
if (BlockInfo.Is64BitMode && CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux &&
RIP >= VSyscall_Base && RIP < VSyscall_End) {
// VSyscall
// This doesn't exist on AArch64 and on x86_64 hosts this is emulated with faults to a region mapped with --xp permissions
// Offset 0: vgettimeofday
FEXCore/Source/Interface/Core/JIT/MiscOps.cpp
+1 -1
View File
@@ -76,7 +76,7 @@ DEF_OP(Break) {
LoadConstant(ARMEmitter::Size::i64Bit, TMP1, Constant);
str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData));
if (CTX->HostFeatures.SupportsFaultFreeSynchronousFaults) {
if (CTX->HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults) {
ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SynchronousFault));
br(TMP1);
} else {
FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+6 -6
View File
@@ -4884,7 +4884,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) {
case 0xCD: { // INT imm8
uint8_t Literal = Op->Src[0].Literal();
if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) {
if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) {
constexpr uint8_t SYSCALL_LITERAL = 0x80;
if (Literal == SYSCALL_LITERAL) {
if (Is64BitMode) [[unlikely]] {
@@ -4896,8 +4896,8 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) {
SyscallOp(Op, false);
return;
}
} else if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 ||
CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) {
} else if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 ||
CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) {
constexpr uint8_t SYSCALL_LITERAL = 0x2E;
if (Literal == SYSCALL_LITERAL) {
// Can be used for both 64-bit and 32-bit syscalls on windows
@@ -4905,7 +4905,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) {
return;
}
if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) {
if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) {
// This is used when QueryPerformanceCounter is called on recent Windows versions, it causes CNTVCT to be written into RAX.
constexpr uint8_t GET_CNTVCT_LITERAL = 0x81;
if (Literal == GET_CNTVCT_LITERAL) {
@@ -5151,7 +5151,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) {
// - Explicitly use an MFENCE before this instruction if you want this behaviour
// This instruction is not an execution fence, so subsequent instructions can execute after this
// - Explicitly use an LFENCE after RDTSCP if you want to block this behaviour
if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) {
if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) {
// RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported.
UnimplementedOp(Op);
return;
@@ -5165,7 +5165,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) {
}
void OpDispatchBuilder::RDPIDOp(OpcodeArgs) {
if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) {
if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) {
// RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported.
UnimplementedOp(Op);
return;
FEXCore/include/FEXCore/Core/HostFeatures.h
+59 -42
View File
@@ -14,7 +14,7 @@ namespace FEXCore {
*/
struct HostFeatures {
// Changes code generation slightly.
enum class HostTypeEnum : uint32_t {
enum class HostTypeEnum : uint8_t {
Unknown,
Linux,
Wow64,
@@ -32,65 +32,82 @@ struct HostFeatures {
return 4 << DCacheLineLog2;
}
/**
* @brief This structure contains all the data required to determine hashing at the "process" level.
* Unlike the `HostFeaturesHash` below, this data changes codegen depending on if the process is Linux, Arm64EC, or Wow64.
*/
struct ProcessFeaturesHash {
HostTypeEnum HostType : 2 {};
uint8_t SupportsFaultFreeSynchronousFaults : 1 {};
// This only determines the starting mode a process started in.
// The process can technically long jump to-from the other modes.
uint8_t Is64BitMode : 1 {};
uint8_t pad : 4 {};
};
static_assert(sizeof(ProcessFeaturesHash) == 1);
struct CacheHash {
// This hash is used to determine the "bucket" a machine goes in to.
// This should match between Linux, Arm64EC, and Wow64.
uint64_t HostFeaturesHash;
HostTypeEnum HostType;
// This hash is used to determine features that are different between process types.
ProcessFeaturesHash ProcessFeaturesHash;
};
[[nodiscard]]
CacheHash HashForCaching() const {
static_assert(offsetof(HostFeatures, HostType) == 8);
static_assert(offsetof(HostFeatures, ProcessFeatures) == 8);
CacheHash Result {};
memcpy(&Result.HostFeaturesHash, this, sizeof(uint64_t));
Result.HostType = HostType;
Result.ProcessFeaturesHash = ProcessFeatures;
return Result;
}
// Affects codegen and is basically machine description.
uint32_t DCacheLineLog2 : 4 {};
uint32_t SupportsCacheMaintenanceOps : 1 {};
uint32_t SupportsAES : 1 {};
uint32_t SupportsCRC : 1 {};
uint32_t SupportsCLZERO : 1 {};
uint32_t SupportsAtomics : 1 {};
uint32_t SupportsRCPC : 1 {};
uint32_t SupportsTSOImm9 : 1 {};
uint32_t SupportsRAND : 1 {};
uint32_t SupportsAVX : 1 {};
uint32_t SupportsSVE128 : 1 {};
uint32_t SupportsSVE256 : 1 {};
uint32_t SupportsSHA : 1 {};
uint32_t SupportsPMULL_128Bit : 1 {};
uint32_t SupportsCSSC : 1 {};
uint32_t SupportsFCMA : 1 {};
uint32_t SupportsFlagM : 1 {};
uint32_t SupportsFlagM2 : 1 {};
uint32_t SupportsRPRES : 1 {};
uint32_t SupportsPreserveAllABI : 1 {};
uint32_t SupportsAES256 : 1 {};
uint32_t SupportsSVEBitPerm : 1 {};
uint32_t SupportsCPUIndexInTPIDRRO : 1 {};
uint32_t SupportsFRINTTS : 1 {};
uint32_t SupportsECV : 1 {};
uint32_t SupportsWFXT : 1 {};
uint32_t Supports3DNow : 1 {};
uint32_t SupportsSSE4a : 1 {};
uint32_t SupportsMOPS : 1 {};
uint32_t SupportsI8MM : 1 {};
uint32_t SupportsDotProd : 1 {};
uint32_t PreferZVAForVZero : 1 {};
uint32_t SupportsAFP : 1 {};
uint32_t SupportsFloatExceptions : 1 {};
uint32_t SupportsFaultFreeSynchronousFaults : 1 {};
uint32_t SupportsBF16 : 1 {};
uint32_t DCacheLineLog2 : 4 {};
uint32_t SupportsCacheMaintenanceOps : 1 {};
uint32_t SupportsAES : 1 {};
uint32_t SupportsCRC : 1 {};
uint32_t SupportsCLZERO : 1 {};
uint32_t SupportsAtomics : 1 {};
uint32_t SupportsRCPC : 1 {};
uint32_t SupportsTSOImm9 : 1 {};
uint32_t SupportsRAND : 1 {};
uint32_t SupportsAVX : 1 {};
uint32_t SupportsSVE128 : 1 {};
uint32_t SupportsSVE256 : 1 {};
uint32_t SupportsSHA : 1 {};
uint32_t SupportsPMULL_128Bit : 1 {};
uint32_t SupportsCSSC : 1 {};
uint32_t SupportsFCMA : 1 {};
uint32_t SupportsFlagM : 1 {};
uint32_t SupportsFlagM2 : 1 {};
uint32_t SupportsRPRES : 1 {};
uint32_t SupportsPreserveAllABI : 1 {};
uint32_t SupportsAES256 : 1 {};
uint32_t SupportsSVEBitPerm : 1 {};
uint32_t SupportsCPUIndexInTPIDRRO : 1 {};
uint32_t SupportsFRINTTS : 1 {};
uint32_t SupportsECV : 1 {};
uint32_t SupportsWFXT : 1 {};
uint32_t Supports3DNow : 1 {};
uint32_t SupportsSSE4a : 1 {};
uint32_t SupportsMOPS : 1 {};
uint32_t SupportsI8MM : 1 {};
uint32_t SupportsDotProd : 1 {};
uint32_t PreferZVAForVZero : 1 {};
uint32_t SupportsAFP : 1 {};
uint32_t SupportsFloatExceptions : 1 {};
uint32_t SupportsBF16 : 1 {};
// Flag if this is InstCountCI
uint32_t IsInstCountCI : 1 {};
uint32_t pad : 24 {};
uint32_t pad : 25 {};
// This affects codegen, but it isn't machine state
HostTypeEnum HostType {};
ProcessFeaturesHash ProcessFeatures {};
// MIDR information
// Also used for determining number of CPU cores for CPUID
Source/Common/HostFeatures.cpp
+5 -2
View File
@@ -601,7 +601,7 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe
OverrideFeatures(&HostFeatures, ForceSVEWidth());
}
FEXCore::HostFeatures FetchHostFeatures() {
FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode) {
FEX_CONFIG_OPT(CPUFeatureRegisters, CPUFEATUREREGISTERS);
CPUFeatures Features {};
@@ -634,7 +634,10 @@ FEXCore::HostFeatures FetchHostFeatures() {
FetchHostFeatures(Features, HostFeatures, true, CTR, MIDR);
HostFeatures.SupportsCPUIndexInTPIDRRO = false;
HostFeatures.HostType = FEXCore::HostFeatures::HostTypeEnum::Linux;
HostFeatures.ProcessFeatures.HostType = FEXCore::HostFeatures::HostTypeEnum::Linux;
HostFeatures.ProcessFeatures.Is64BitMode = Is64BitMode;
// Fault free syncronous faults unsupported on Linux for now.
HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults = false;
HostFeatures.ProcessPID = ::getpid();
return HostFeatures;
}
Source/Common/HostFeatures.h
+1 -1
View File
@@ -692,6 +692,6 @@ void FillMIDRInformationViaLinux(FEXCore::HostFeatures* Features);
void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFeatures, bool SupportsCacheMaintenanceOps, uint64_t CTR,
uint64_t MIDR);
FEXCore::HostFeatures FetchHostFeatures();
FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode);
FEX::CPUFeatures GetCPUFeaturesFromIDRegisters();
} // namespace FEX
Source/Tools/CodeSizeValidation/Main.cpp
+1 -1
View File
@@ -702,7 +702,7 @@ int main(int argc, char** argv, char** const envp) {
// Create FEXCore context.
fextl::unique_ptr<FEXCore::Context::Context> CTX;
{
auto HostFeatures = FEX::FetchHostFeatures();
auto HostFeatures = FEX::FetchHostFeatures(TestHeaderData->Bitness == 64);
HostFeatures.IsInstCountCI = true;
CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures);
}
Source/Tools/FEXInterpreter/FEXInterpreter.cpp
+1 -1
View File
@@ -550,7 +550,7 @@ int main(int argc, char** argv, char** const envp) {
bool SupportsSVE256 {};
fextl::unique_ptr<FEXCore::Context::Context> CTX;
{
auto HostFeatures = FEX::FetchHostFeatures();
auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode());
CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures);
SupportsAVX = HostFeatures.SupportsAVX;
SupportsSVE256 = HostFeatures.SupportsSVE256;
Source/Tools/FEXOfflineCompiler/Main.cpp
+1 -1
View File
@@ -410,7 +410,7 @@ static std::optional<std::string> GenerateSingleCache(FEXCore::ExecutableFileInf
// Load HostFeatures
#ifndef _WIN32
auto HostFeatures = FEX::FetchHostFeatures();
auto HostFeatures = FEX::FetchHostFeatures(Is64Bit);
#else
const auto NtDll = GetModuleHandleW(L"ntdll.dll");
const bool IsWine = !!GetProcAddress(NtDll, "wine_get_version");
Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
+1 -1
View File
@@ -245,7 +245,7 @@ int main(int argc, char** argv, char** const envp) {
bool SupportsAVX = false;
FEXCore::Core::CPUState State;
auto HostFeatures = FEX::FetchHostFeatures();
auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode());
auto CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures);
#ifndef _WIN32
Source/Windows/Common/CPUFeatures.cpp
+7 -8
View File
@@ -83,16 +83,15 @@ FEXCore::HostFeatures CPUFeatures::FetchHostFeatures(bool IsWine, FEXCore::HostF
HostFeatures.SupportsCPUIndexInTPIDRRO = !IsWine;
HostFeatures.HostType = HostType;
HostFeatures.ProcessPID = ProcessPID;
if (HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64) {
// AVX is unsupported for WOW64
HostFeatures.SupportsAVX = false;
} else {
// arm64ec supports synchronous faults without a double-fault dance.
HostFeatures.SupportsFaultFreeSynchronousFaults = true;
}
// AVX is unsupported for WOW64
HostFeatures.SupportsAVX = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec;
HostFeatures.ProcessFeatures.HostType = HostType;
HostFeatures.ProcessFeatures.Is64BitMode = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec;
// arm64ec supports synchronous faults without a double-fault dance.
HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec;
return HostFeatures;
}
unittests/InstructionCountCI/AFP/H0F3A.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"roundss xmm0, xmm1, 00000000b": {
unittests/InstructionCountCI/AFP/SVE256/Secondary.json
+1 -1
View File
@@ -7,7 +7,7 @@
"AFP"
],
"DisabledHostFeatures": [],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtpi2ps xmm0, [rax]": {
unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json
+1 -1
View File
@@ -9,7 +9,7 @@
"DisabledHostFeatures": [
"RPRES"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtsi2ss xmm0, eax": {
unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json
+1 -1
View File
@@ -7,7 +7,7 @@
"AFP"
],
"DisabledHostFeatures": [],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtsi2sd xmm0, eax": {
unittests/InstructionCountCI/AFP/Secondary.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtpi2ps xmm0, [rax]": {
unittests/InstructionCountCI/AFP/Secondary_REP.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"RPRES"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtsi2ss xmm0, eax": {
unittests/InstructionCountCI/AFP/Secondary_REPNE.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"cvtsi2sd xmm0, eax": {
unittests/InstructionCountCI/AFP/VEX_map1.json
+1 -1
View File
@@ -9,7 +9,7 @@
"DisabledHostFeatures": [
"RPRES"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vsqrtss xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AFP/VEX_map3.json
+1 -1
View File
@@ -7,7 +7,7 @@
"AFP"
],
"DisabledHostFeatures": [],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vroundss xmm0, xmm1, 00000000b": {
unittests/InstructionCountCI/AVX128/FMA4.json
+1 -1
View File
@@ -7,7 +7,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vfmaddsubps xmm0, xmm1, xmm2, xmm3": {
unittests/InstructionCountCI/AVX128/VEX_map1.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vmovups xmm0, xmm0": {
unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vaddsubpd xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json
+1 -1
View File
@@ -10,7 +10,7 @@
"FLAGM2",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vmovntps [rax], xmm0": {
unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vucomiss xmm0, xmm1": {
unittests/InstructionCountCI/AVX128/VEX_map2.json
+1 -1
View File
@@ -13,7 +13,7 @@
"I8MM",
"DOTPROD"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vpshufb xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vfmadd132ss xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json
+1 -1
View File
@@ -12,7 +12,7 @@
"SVE256",
"I8MM"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vpdpbusd xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json
+1 -1
View File
@@ -11,7 +11,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vpdpbusd xmm0, xmm1, xmm2": {
unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
+1 -1
View File
@@ -10,7 +10,7 @@
"FLAGM2",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vmovntdqa xmm0, [rax]": {
unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json
+1 -1
View File
@@ -11,7 +11,7 @@
"SVE256",
"SVEBITPERM"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vtestps xmm0, xmm1": {
unittests/InstructionCountCI/AVX128/VEX_map3.json
+1 -1
View File
@@ -7,7 +7,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vpermq ymm0, ymm1, 1": {
unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json
+1 -1
View File
@@ -8,7 +8,7 @@
"AFP",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vblendvps xmm0, xmm1, xmm2, xmm3": {
unittests/InstructionCountCI/AVX128/VEX_map_group.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"SVE128"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vpsrlw xmm0, xmm1, 0": {
unittests/InstructionCountCI/Atomics.json
+1 -1
View File
@@ -9,7 +9,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"lock add byte [rax], cl": {
unittests/InstructionCountCI/Crypto/H0F38.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"sha1nexte xmm0, xmm1": {
unittests/InstructionCountCI/Crypto/H0F38_SVE128.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"sha1nexte xmm0, xmm1": {
unittests/InstructionCountCI/Crypto/H0F3A.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"pclmulqdq xmm0, xmm1, 00000b": {
unittests/InstructionCountCI/DDD.json
+1 -1
View File
@@ -10,7 +10,7 @@
"AFP",
"RPRES"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These 3DNow! instructions are optimal assuming that FEX doesn't SRA MMX registers",
unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json
+1 -1
View File
@@ -8,7 +8,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"Instructions that explicitly push against the limits of ARM's loadstore instructions"
unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json
+1 -1
View File
@@ -8,7 +8,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"Instructions that explicitly push against the limits of ARM's loadstore instructions"
unittests/InstructionCountCI/FEXOpt/MultiInst.json
+1 -1
View File
@@ -13,7 +13,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These are instruction combinations that could be more optimal if FEX optimized for them"
unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
+1 -1
View File
@@ -11,7 +11,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These are instruction combinations that could be more optimal if FEX optimized for them"
unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"RPRES"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These are instruction combinations that could be more optimal if FEX optimized for them"
unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json
+1 -1
View File
@@ -14,7 +14,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These are instruction combinations that could be more optimal if FEX optimized for them"
unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
+1 -1
View File
@@ -14,7 +14,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"These are instruction combinations that could be more optimal if FEX optimized for them"
unittests/InstructionCountCI/FEXOpt/Peephole.json
+1 -1
View File
@@ -11,7 +11,7 @@
"I8MM",
"DOTPROD"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"This file tracks the translations for the 'peephole' optimizations in FEX.",
unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json
+1 -1
View File
@@ -10,7 +10,7 @@
"FLAGM2",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"This file tracks the translations for the 'peephole' optimizations in FEX.",
unittests/InstructionCountCI/FEXOpt/libnss.json
+1 -1
View File
@@ -12,7 +12,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [],
"Instructions": {
unittests/InstructionCountCI/FlagM/Atomics.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"lock add byte [rax], cl": {
unittests/InstructionCountCI/FlagM/FlagOpts.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Chained add": {
unittests/InstructionCountCI/FlagM/H0F38.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"ptest xmm0, xmm1": {
unittests/InstructionCountCI/FlagM/HotBlocks.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"The Witcher 3": {
unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Sonic Mania movie player": {
unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"FMOD scalar loop": {
unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"The Sims 1 hot block": {
unittests/InstructionCountCI/FlagM/Primary.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"add bl, cl": {
unittests/InstructionCountCI/FlagM/PrimaryGroup.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"add al, 1": {
unittests/InstructionCountCI/FlagM/Primary_32Bit.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"push es": {
unittests/InstructionCountCI/FlagM/Secondary.json
+1 -1
View File
@@ -11,7 +11,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"ucomiss xmm0, xmm1": {
unittests/InstructionCountCI/FlagM/SecondaryGroup.json
+1 -1
View File
@@ -11,7 +11,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"sgdt [rax]": {
unittests/InstructionCountCI/FlagM/SecondaryModRM.json
+1 -1
View File
@@ -11,7 +11,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"xgetbv": {
unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
+1 -1
View File
@@ -11,7 +11,7 @@
"AFP",
"FCMA"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"ucomisd xmm0, xmm1": {
unittests/InstructionCountCI/FlagM/Secondary_REP.json
+1 -1
View File
@@ -12,7 +12,7 @@
"AFP",
"CSSC"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"popcnt ax, bx": {
unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json
+1 -1
View File
@@ -12,7 +12,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"popcnt ax, bx": {
unittests/InstructionCountCI/FlagM/VEX_map1.json
+1 -1
View File
@@ -12,7 +12,7 @@
"RPRES",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vucomiss xmm0, xmm1": {
unittests/InstructionCountCI/FlagM/VEX_map2.json
+1 -1
View File
@@ -10,7 +10,7 @@
"AFP",
"SVEBITPERM"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vtestps xmm0, xmm1": {
unittests/InstructionCountCI/FlagM/VEX_map_group.json
+1 -1
View File
@@ -9,7 +9,7 @@
"DisabledHostFeatures": [
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"blsr eax, ebx": {
unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+1 -1
View File
@@ -10,7 +10,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87.json
+1 -1
View File
@@ -11,7 +11,7 @@
"CSSC",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"fadd dword [rax]": {
unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"Block1": {
unittests/InstructionCountCI/FlagM/x87_f64.json
+1 -1
View File
@@ -13,7 +13,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"fadd dword [rax]": {
unittests/InstructionCountCI/H0F38.json
+1 -1
View File
@@ -10,7 +10,7 @@
"FLAGM2",
"CRYPTO"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"pshufb mm0, mm1": {
unittests/InstructionCountCI/H0F3A.json
+1 -1
View File
@@ -8,7 +8,7 @@
"AFP",
"CRYPTO"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"SSE4.2 string instructions are skipped here.",
unittests/InstructionCountCI/H0F3A_SVE128.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"dpps xmm0, xmm1, 00000000b": {
unittests/InstructionCountCI/MOPS/Primary.json
+1 -1
View File
@@ -11,7 +11,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"rep movsb": {
unittests/InstructionCountCI/Primary.json
+1 -1
View File
@@ -10,7 +10,7 @@
"FLAGM2",
"MOPS"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"add bl, cl": {
unittests/InstructionCountCI/PrimaryGroup.json
+1 -1
View File
@@ -9,7 +9,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"Instructions in this table that are marked optimal don't have their flag calculation part of this assumption",
unittests/InstructionCountCI/Primary_32Bit.json
+1 -1
View File
@@ -9,7 +9,7 @@
"FlagM",
"FlagM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"push es": {
unittests/InstructionCountCI/RPRES/DDD.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"pfrcpv mm0, mm1": {
unittests/InstructionCountCI/RPRES/Secondary.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"rsqrtps xmm0, xmm1": {
unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"rsqrtss xmm0, xmm1": {
unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json
+1 -1
View File
@@ -8,7 +8,7 @@
"AFP"
],
"DisabledHostFeatures": [],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"vrsqrtps xmm0, xmm1": {
unittests/InstructionCountCI/Repeat.json
+1 -1
View File
@@ -6,7 +6,7 @@
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {}
}
unittests/InstructionCountCI/SSE42_Strings.json
+1 -1
View File
@@ -33,7 +33,7 @@
" - 1b: ECX = MSB",
"[7] - Reserved"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"pcmpestrm xmm0, xmm1, 0_0_00_00_00b": {
unittests/InstructionCountCI/Secondary.json
+1 -1
View File
@@ -12,7 +12,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Comment": [
"MMX instructions are defined as optimal without SRA being used for these instructions.",
unittests/InstructionCountCI/SecondaryGroup.json
+1 -1
View File
@@ -11,7 +11,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"sgdt [rax]": {
unittests/InstructionCountCI/SecondaryModRM.json
+1 -1
View File
@@ -11,7 +11,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"xgetbv": {
unittests/InstructionCountCI/Secondary_32Bit.json
+1 -1
View File
@@ -7,7 +7,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"push fs": {
unittests/InstructionCountCI/Secondary_OpSize.json
+1 -1
View File
@@ -12,7 +12,7 @@
"FLAGM",
"FLAGM2"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"movupd xmm0, xmm0": {
unittests/InstructionCountCI/Secondary_OpSize_FCMA.json
+1 -1
View File
@@ -9,7 +9,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"addsubpd xmm0, xmm1": {
unittests/InstructionCountCI/Secondary_OpSize_SVE128.json
+1 -1
View File
@@ -8,7 +8,7 @@
"SVE256",
"AFP"
],
"BinaryCacheVersion": 34
"BinaryCacheVersion": 35
},
"Instructions": {
"psrlw xmm0, xmm1": {
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