Commit Graph
28 Commits
Author SHA1 Message Date
Ryan Houdek 42830d3e48 Merge pull request #22 from phire/fix_condslt
Fix Signed LT in x86 jit
2020-03-12 22:02:12 -07:00
Scott Mansell f2967e8ef9 OP_NEG/OP_NOT: add support for other opsizes. 2020-03-13 17:54:09 +13:00
Scott Mansell 99d1dcad98 Fix Neg IR_OP, Add Not IR_OP
In some places, Neg meant logical one's complement negation.
In others it meant arithmetic two's complement negation.

As both x87 and aarch64 have neg instructions that do
two's complement negations, we will standardise on that.

Additionally we will add a Not_IR op for one's complement
2020-03-13 17:53:57 +13:00
Scott Mansell ba4e311dc2 Fix Signed LT in x86 jit 2020-03-13 17:52:49 +13:00
Stefanos Kornilios Mitsis Poiitidis 99399ecbac Merge pull request #10 from Sonicadvance1/unittests/cmps
Adds unit tests for the CMPS instruction family
2020-03-12 10:57:59 +02:00
Ryan Houdek 1b4ea20b17 Implements REPNE for SCAS 2020-03-10 18:21:16 -07:00
Ryan Houdek a8f4e8a860 Implements CMPS support for REPNE and no prefix 2020-03-10 18:18:06 -07:00
Stefanos Kornilios Mitsis Poiitidis 963de98276 Merge pull request #7 from Sonicadvance1/unittests/primary_1
Primary table unit tests and a couple fixes
2020-03-10 15:26:05 +02:00
Stefanos Kornilios Mitsis Poiitidis e2e9e1eb41 Merge pull request #9 from Sonicadvance1/unittests/stos
Adds unit tests for the STOS instruction family
2020-03-10 15:25:49 +02:00
Stefanos Kornilios Mitsis Poiitidis dc2ed29e18 Merge pull request #8 from Sonicadvance1/unittests/movs
Adds unit tests for the MOVS instruction family
2020-03-10 09:47:29 +02:00
Ryan Houdek 4f0a8187ce Implements support for STOS without REP flag
It doesn't support REPNE so update that assert as well
2020-03-09 22:59:07 -07:00
Ryan Houdek edf472a98a Updates assert in the MOVS
REPNE on MOVS is unsupported, most likely the prefix is ignored but
until a hardware test can confirm update the comment
2020-03-09 22:31:31 -07:00
Ryan Houdek 7a052000c9 Implements SCAS with no repeat prefix
This is used in a couple unit tests
2020-03-09 18:15:05 -07:00
Ryan Houdek 66b08b3bad Fixes MOV to moffset destination
With how we decode literals the destination actually ends up in Src[1]
2020-03-09 18:14:20 -07:00
Ryan Houdek 0fc06c7bfa Implements an x86Table flag to partially ignore overlays
Currently only support partially ignoring for overlay 0x66, this means
we only support no overlay at all and 0x66. Using only two bits of flag
space rather than 3.
If we find an instruction family that supports a different one then we
should break it out to three independent flags. Keeping it two until
then

Unit tests to ensure this keeps working is forthcoming
2020-03-09 13:06:46 -07:00
Stefanos Kornilios Mitsis Poiitidis 39f639e07a Merge pull request #4 from Sonicadvance1/fix_push_reg
Fixes PUSH with register encoded in op
2020-03-09 11:35:20 +02:00
Ryan Houdek e1c7c9c0f3 Fixes BTC, BSF, BSR, and XADD table flags
They require FLAGS_NO_OVERLAY otherwise the frontend can't find the
instructions.
2020-03-08 22:07:00 -07:00
Ryan Houdek c11ac417ce Fixes BSR and BSF 32bit op when source is zero
BSR/BSF needs to not write to destination when source is zero
This ensures it doesn't clear the upper 32bits of the register in this
case.
2020-03-08 22:05:47 -07:00
Ryan Houdek 30b2f019b4 Implements 16bit SHLD/SHRD
Unit tests found them missing
2020-03-08 22:05:08 -07:00
Ryan Houdek 19a6292813 Fixes bug in SHRD
Need to negate by the size of the op, not just regular negate
instruction
2020-03-08 22:04:26 -07:00
Ryan Houdek 2726e2512d Fixes PUSH with register encoded in op
Unittest to ensure this keeps working is forthcoming.
2020-03-08 16:05:25 -07:00
Ryan Houdek e9092b328b Implements 16bit long div and long remainder in interpreter
Missed this originally when implementing, unit tests found it missing
2020-03-07 21:52:40 -08:00
Ryan Houdek 86fb69a5a2 Fixes CVTDQ2PS that unit tests uncovered
This was actually doing 2xint32 -> 2xdouble translations initially.
Needed to do 4xint32 -> 4xfloat
2020-03-07 21:51:45 -08:00
Ryan Houdek 2da7e9d29b Minor cleanup in the flag calculation for sub
No need to make a switch statement to extract the sign bit of the source
2020-03-07 21:51:04 -08:00
Ryan Houdek 03c954930a Fixes translation of a 16bit CALL instruction
This instruction is effectively dead since Linux reserves the lower
16bits for itself, but in the case that someone manages to encode it
then we will at least attempt to access the correct RIP.
2020-03-07 21:49:46 -08:00
Ryan Houdek 463710929a Fixes a bug in PUSH that unit tests uncovered
In an edge cases of pushing with a 32bit immediate sign extended to
64bit then there could have been a conflict.
Rearrange the ordering a bit to ensure it is correct
2020-03-07 21:48:22 -08:00
Ryan Houdek 65b85b2b4d Fixes bugs uncovered by the Group1 Primary table unit tests
These instructions treat the immediate encoding differently depending on
the operating size of the instruction

For 16bit and 32bit operation they treat the immediate as an
appropriately sized immediate.
For 64bit operand size the immediate is sign extended to handle the new
operating width.
CMP was previously set to SEXT for this which would have its own set of
problems handling it like that.
2020-03-06 22:12:16 -08:00
Stefanos Kornilios Mitsis Poiitidis e9ea4cbb76 FEXCore: Move to Externals/FEXCore 2020-03-06 09:07:37 +02:00