Commit Graph
598 Commits
Author SHA1 Message Date
Ryan Houdek c122516077 Adds resizable frontend decoded buffer
Allows us to save memory in the frontend decoder by starting out with a
small buffer until we hit larger code blocks.
2020-11-17 12:43:26 -08:00
Ryan Houdek deaf879e78 Merge pull request #490 from FEX-Emu/skmp/extended-condjump-branching
CondJump: Add support for two operands to match Select
2020-11-17 01:19:21 -08:00
Stefanos Kornilios Mitsis Poiitidis 1ffc8c15e2 Backends: Add OP_INVALIDATEFLAGS as nop 2020-11-17 11:11:18 +02:00
Stefanos Kornilios Mitsis Poiitidis 11e12a9b36 Add --unsafe-no-pf 2020-11-17 11:11:13 +02:00
Stefanos Kornilios Mitsis Poiitidis 8fc6f73571 IR: InvalidateFlags + --abi-local-flags
- InvalidateFlags pseudo-op is a hint for the Dead Flags Elimination pass that flags are not needed past that point
- Adds a new option, --abi-local-flags, that invalidates the flags on CALLs or RETs. This might break code that doesn't follow the ABI rules.
2020-11-17 11:08:29 +02:00
Stefanos Kornilios Mitsis Poiitidis 2dad4718d6 IR: Add DumpIR option, --dump-ir command line
This dumps the IR before and after optimizations

--dump-ir can be

"no" -> Do not dump
"stderr" -> Dump to stderr
"stdout" -> Dump to stdout
"some/path" -> Dump to "some/path/$GuestRip-pre.ir" and "some/path/$GuestRip-post.ir"
2020-11-16 16:14:07 +02:00
Stefanos Kornilios Mitsis Poiitidis 075958fa67 CondJump: Fix arm64 build 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis a2ffbfedb3 CondJump: Add x86 and ipr backends 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis f9f80b77e5 CondJump/Arm64: Use cbnz/cbz if faster 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis 709f5cd925 CondJump: Now with cmp/b.cc support 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis eafe853c75 CondJump: Switch to two arguments + Cond for flexible branching 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis 009244c5e0 Merge pull request #488 from FEX-Emu/skmp/improved-select
Select: Add compare & Data sizes, cset/setcc specializations
2020-11-06 10:43:33 +02:00
Stefanos Kornilios Mitsis Poiitidis 2e6a3febfb Merge pull request #491 from FEX-Emu/skmp/cc-refactor
OpDisp: jCC, setCC & cmovCC refactor
2020-11-06 09:11:02 +02:00
Stefanos Kornilios Mitsis Poiitidis 547b00cbb4 Merge pull request #483 from FEX-Emu/skmp/mul-arm64-less-exts
MUL: remove zext/sexts from 32 bit form
2020-11-06 09:06:54 +02:00
Stefanos Kornilios Mitsis Poiitidis aea18a3c03 Merge pull request #480 from FEX-Emu/skmp/fallthrough-branching
JIT: fallthrough branching
2020-11-06 08:59:41 +02:00
Stefanos Kornilios Mitsis Poiitidis 1b3683c065 MUL: remove zext/sexts from 32 bit form 2020-11-06 08:55:58 +02:00
Stefanos Kornilios Mitsis Poiitidis 4bb6d6bde6 Merge pull request #481 from FEX-Emu/skmp/dynamic-shift-flags
Dynamic Shifts: use Selects instead of branches for flags
2020-11-06 08:53:55 +02:00
Stefanos Kornilios Mitsis Poiitidis d6fa850b68 Fill/SpillRegister: Spill based on register class 2020-11-06 01:42:04 +02:00
Stefanos Kornilios Mitsis Poiitidis 49d3bafd9a OpDisp: jCC, setCC & cmovCC refactor 2020-11-06 00:37:10 +02:00
Stefanos Kornilios Mitsis Poiitidis 2abfe71c42 Select: Add compare & Data sizes, cset/setcc specializations
- CompareSize can be 4 or 8
- DataSize can be 4 or 8
- Support for INLINE_CONSTANTS for `Select cmp1,cmp2,1,0` that specializes to cset / setcc
2020-11-05 19:46:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 3e84aaa43a Fallthrough: Fixes, x86 impl 2020-11-05 13:30:15 +02:00
Stefanos Kornilios Mitsis Poiitidis 6c0552f145 Dynamic Shifts: use Selects instead of branches for flags 2020-10-30 18:26:40 +02:00
Stefanos Kornilios Mitsis Poiitidis cc311554d2 Frontend: Sort blocks for better branching 2020-10-30 17:50:18 +02:00
Stefanos Kornilios Mitsis Poiitidis 400321bc53 Arm64: Avoid branches to next block of possible 2020-10-30 17:49:07 +02:00
Ryan Houdek 34625441cb Fixes FCOMPP and FUCOMPP
These two instructions pop the x87 stack twice which we didn't support
Repurposes the dead pop template argument to be a "pop twice".
Everything else falls down the table flag information comparison
2020-10-27 23:09:17 -07:00
Ryan Houdek d3d57d48a0 Fixes missing pop flag in x87 table
FCOMP didn't have POP set so it wans't popping the stack.
FFREEP also didn't have it, but it was handled explicitly in the
dispatcher
2020-10-27 23:08:17 -07:00
Ryan Houdek b8b99e7f85 Merge pull request #475 from Sonicadvance1/fix_32bit_x87
Fixes 32bit x87 usage
2020-10-25 11:21:50 -07:00
Ryan Houdek 7f4836b982 Fixes 32bit x87 usage
All of the ops that were relying on a 64bit memory offset were being
downgraded to 32bit.

Abuses the XMM_FLAGS option a bit to indicate that it shouldn't
downgrade the 64bit size flag. Which isn't an issue since all these
operations can't encode a register since modrm_r is used for table
decoding
2020-10-25 11:17:00 -07:00
Stefanos Kornilios Mitsis Poiitidis 82d9b28563 Merge pull request #476 from Sonicadvance1/initial_sse4_1
Adds some initial SSE 4.1 ops
2020-10-25 06:44:58 +02:00
Stefanos Kornilios Mitsis Poiitidis 13dc69987c Merge pull request #474 from Sonicadvance1/more_32bit_fixes_2
More 32bit related fixes
2020-10-25 06:40:27 +02:00
Ryan Houdek f6c2ee40d1 Adds some initial SSE 4.1 ops
These are being used unconditionally by the steam client (browser?) and
Minit.

Push out the initial implementation without unit tests just to get
further.
Would be nice to figure out why these are using these ops instead of
checking if it is supported.
2020-10-24 21:34:23 -07:00
Ryan Houdek c050e094da Adds four new 32bit push and pop ops
push and pop for segment registers and the push/pop all instructions
2020-10-22 19:10:28 -07:00
Ryan Houdek 9888141feb Some more table fixes 2020-10-22 19:10:28 -07:00
Stefanos Kornilios Mitsis Poiitidis 93e372c7a4 IR/JITs: Inline Constants Implementation
Based on @phire's idea, Inline constants are constants that can be used as imms in instructions.

This
- Adds OP_INLINECONSTANT to represent them in the IR
- Modifies the ConstProp pass to transform OP_CONSTANT to OP_INLINECONSTANT based on per-platform heuristics
- Modifies the backends to use imms
- Supported opcodes: Add, Sub, Lsl, Lsr, Asr, Ror, Rol
2020-10-22 18:49:17 +03:00
Ryan Houdek 5af576b554 Fixes SetRoundingMode on AArch64 JIT
Just needed to make sure to use the right register size
2020-10-21 01:31:08 -07:00
Ryan Houdek 5d730db054 Fixes MEM_OFFSET size override.
A couple of instructions were incorrectly marked as mem offset.
Fixes the mem offset literal size which is only modified with the
address size modifier.

Previously this was causing these instructions to narrow based on
operand size override incorrectly
2020-10-17 20:22:21 -07:00
Ryan Houdek b17b3a5721 Fixes literal constant size
It is the size in the bytes unless it is extended.
Once extended it should behave like the operand size
2020-10-17 20:21:17 -07:00
Ryan Houdek dd49a04809 Fixes RIP literal sign extending on 32bit
RIP Literal isn't actually RIP literal on 32bit, it is RIP absolute.
64bit treats the 32bit as a signed offset, while 32bit treats it as a
32bit unsigned offset
2020-10-17 20:19:50 -07:00
Stefanos Kornilios Mitsis Poiitidis 4111f795bd Merge pull request #458 from Sonicadvance1/fs_only_on_64bit
Only sets up FS on 64bit
2020-10-15 19:29:31 +03:00
Ryan Houdek 471f41fa62 Changes CPU family reported by CPUID
Java VM uses this to determine if the CPU is new enough to be a 486 or
newer.

Also fixes some comment text.
Java VM scans all the leafs for hypervisor entries
Instead of adding directly which was causing our CPUID map to grow to
1500 entries.
Do the correct CPUID thing and return zeroes for non-understood leafs.
Gives us the same result since we cover almost all leaves with it anyway
2020-10-13 13:19:07 -07:00
Ryan Houdek 00849a6fee Only sets up FS on 64bit
Unnecessary when executing in 32bit since glibc will set up the TLS
2020-10-13 12:29:19 -07:00
Ryan Houdek 101ef4f42d 32Bit Opdispatcher fixes
Biggest thing is that it fixes segment register prefixing entirely.

Every op that supports segment prefixing now uses a helper to handle the
prefix
2020-10-09 23:33:10 -07:00
Ryan Houdek 9f84e3cead move with literal uses operating size mode for literal size 2020-10-09 23:33:10 -07:00
Ryan Houdek ea1bc55aef Ensures 64bit vector ops don't reduce to 32bit 2020-10-09 23:33:10 -07:00
Ryan Houdek 910de79701 Merge pull request #452 from Sonicadvance1/32bit_move_memoffset
Fixes 32bit move with memoffset
2020-10-07 11:08:06 -07:00
Ryan Houdek d868a1b18d Fixes 32bit move with memoffset
The offset can not be 8bytes on 32bit
2020-10-06 19:57:15 -07:00
Ryan Houdek ba69f5c877 Removes 32bit assert in LEAVE
This is working correctly, just was untested
2020-10-06 19:10:45 -07:00
Ryan Houdek 31be022348 Fixes bad implementation in fallback x86 LZCNT
This was just wrong and the unit tests hadn't caught it
2020-10-04 16:13:03 -07:00
Ryan Houdek 4ff7046ddb Fixes bugs in PSHUFB
If bits were set in the reserved bits then the shuffle was incorrect
2020-10-04 16:10:03 -07:00
Ryan Houdek d9414ee8ad Implements SSE2 MOVNTPD
We apparently missed this one
2020-10-04 16:09:15 -07:00