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Author SHA1 Message Date
Billy Laws ef823ce82b OpcodeDispatcher: Allow x86 code to read CNTVCT on ARM64EC 
Required by newer insider preview versions, I noticed many crashes with
this exception number and QueryPeformanceCounter in the backtrace,
testing with XTA found it to not be passed through and instead write
the host CNTVCT (unscaled) into RAX. No other registers seem to be
affected.
 2024-08-23 21:46:11 +00:00
Mai 4f404160d0 Merge pull request #3995 from Sonicadvance1/missing_header 
LinuxSyscalls: Adds missing header
 2024-08-22 17:22:32 -04:00
Ryan Houdek 5edc69b692 LinuxSyscalls: Adds missing header 2024-08-22 14:02:17 -07:00
Ryan Houdek b6cb897896 Merge pull request #3994 from bylaws/iofix 
Windows: Fix some file operations on actual Windows
 2024-08-22 14:01:56 -07:00
Ryan Houdek 47b3637452 Merge pull request #3993 from bylaws/flags 
ARM64EC: Fix ContextFlag member tests
 2024-08-22 14:01:43 -07:00
Ryan Houdek 5b65f30c8f Merge pull request #3992 from Sonicadvance1/rootfs_fetcher_choose_ui 
FEXRootFSFetcher: Allow UI override through options
 2024-08-22 13:47:54 -07:00
Ryan Houdek 23572539f8 Merge pull request #3991 from Sonicadvance1/fix_feat_lrcpc_sigbus 
Arm64: Fixes SIGBUS handler for FEAT_LRCPC
 2024-08-22 13:47:39 -07:00
Alyssa Rosenzweig 43cd897cf4 Merge pull request #3988 from alyssarosenzweig/opt/idea 
Optimize `adc x, 0`
 2024-08-22 11:05:16 -04:00
Alyssa Rosenzweig e593807856 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-22 10:51:06 -04:00
Alyssa Rosenzweig ce8e6e5c0c OpcodeDispatcher: optimize adc 0 
clang generates this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-22 10:51:06 -04:00
Alyssa Rosenzweig 5b9a7c7845 InstCountCI: add IDEA blocks 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-22 10:51:06 -04:00
Alyssa Rosenzweig 0e5f5a2db9 Merge pull request #3990 from alyssarosenzweig/opt/tst-al-1 
Optimise `test al, 1`
 2024-08-22 10:48:44 -04:00
Alyssa Rosenzweig 50a9cea16e Merge pull request #3989 from alyssarosenzweig/ici/x8count 
InstCountCI: include x86 instruction count
 2024-08-22 10:44:44 -04:00
Billy Laws 6aa95d82f2 Windows: Query FileStandardInformation for getting file EOF info 
FileEOFInformation is write-only on actual windows.
 2024-08-22 14:34:45 +00:00
Billy Laws 7c34f449d1 Windows: Translate file open flags passed to NtCreateFile 2024-08-22 14:34:45 +00:00
Billy Laws e9435203a0 Windows: Fix access() implementation 
Had the result inverted.
 2024-08-22 14:33:06 +00:00
Billy Laws 8d9ba0e102 ARM64EC: Fix ContextFlag member tests 
There is a common arch bit that is included in each individual mask,
explicitly test for equality against the whole mask to avoid just
testing for this.
 2024-08-22 14:31:11 +00:00
Ryan Houdek 2631b113da FEXRootFSFetcher: Allow UI override through options 
For #3987
 2024-08-21 18:45:07 -07:00
Ryan Houdek da152031b3 unittest: Adds unittest for unaligned loadstores hitting the correct SIGBUS handler 2024-08-21 18:05:31 -07:00
Ryan Houdek be9c5678c0 Arm64: Fixes SIGBUS handler for FEAT_LRCPC 
When #3899 refactored some of this code, it had split an if-else chain
in to two independent if-else chains. Turns out there was a minor
dependency between them. Add back the few checks necessary to ensure
that FEAT_LRCPC falls through before hitting the FEAT_LSE checks.

This is necessary because their instructions share an encoding so the
masks between the two instruction classes overlap slightly.
 2024-08-21 18:01:55 -07:00
Alyssa Rosenzweig fdd370dd1a InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig 6951284924 OpcodeDispatcher: optimize ADCX/ADOX 
rewrite to use native adcs with flag fixups.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig b03c613fbf OpcodeDispatcher: optimize JP/JNP 
fuse and+cbnz into tbz/tbnz.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig b893bdb8df OpcodeDispatcher: optimize fcmovu 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig db45f6eec8 OpcodeDispatcher: optimize test with small immediate 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig d53e689e22 IR: model tbz/tbnz 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 17:52:22 -04:00
Alyssa Rosenzweig d935d25f0c InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 11:48:03 -04:00
Alyssa Rosenzweig 84cf1d2fd2 InstCountCI: include x86 instruction count 
useful for checking blow up ratios. I keep calculating this by hand so let's
just add it to the json

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-21 11:47:55 -04:00
Ryan Houdek cfa2ad8423 Merge pull request #3986 from alyssarosenzweig/opt/test-x-x 
Optimize test
 2024-08-20 19:20:57 -07:00
Alyssa Rosenzweig 19010491da InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 21:17:08 -04:00
Alyssa Rosenzweig 5d613e8716 OpcodeDispatcher: optimize test x, x 
fewer uops now that we invert carry

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 21:17:08 -04:00
Alyssa Rosenzweig 894aaa980f Merge pull request #3975 from Sonicadvance1/update_wfe_comment 
SpinWaitLock: Update comment about WFE spurious wakeups
 2024-08-20 20:55:30 -04:00
Ryan Houdek 877b2f4fef Merge pull request #3955 from alyssarosenzweig/opt/pop-final 
Rearrange SRA to let us coalesce cmpxchg moves
 2024-08-20 17:36:11 -07:00
Ryan Houdek 2a170cfdec Merge pull request #3985 from alyssarosenzweig/opt/tso 
OpcodeDispatcher: fix tso checks
 2024-08-20 17:18:21 -07:00
Alyssa Rosenzweig a299d6b1a5 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 20:17:06 -04:00
Alyssa Rosenzweig ffb85e6305 ArchHelpers: rearrange SRA layout to coalesce cmpxchg 
linux only for now, arm64ec should do something similar.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 20:14:08 -04:00
Alyssa Rosenzweig d7a20fa28f OpcodeDispatcher: fix tso checks 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 20:11:06 -04:00
Ryan Houdek 5ac7d5dfcd Merge pull request #3980 from alyssarosenzweig/opt/avx 
Optimize AVX load/store with ldp/stp
 2024-08-20 16:29:55 -07:00
Alyssa Rosenzweig 75644b33df InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:36:50 -04:00
Alyssa Rosenzweig 4c4c6e7807 OpcodeDispatcher: pair loads on cortex 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:36:50 -04:00
Alyssa Rosenzweig a8c9c71ce3 OpcodeDispatcher: use loadcontextpair 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 8a4bd5f22c OpcodeDispatcher: pair avx128 save 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 138a36c69a OpcodeDispatcher: pair avx128 restore 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 3400ca5d42 OpcodeDispatcher: pair avx restore 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 5d8164da4e OpcodeDispatcher: pair restore x87 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 8b89b30a6f OpcodeDispatcher: pair restore SSE 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig e66d7cfd6c OpcodeDispatcher: pair mm save 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 63afa29dae OpcodeDispatcher: pair save AVX 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 926a9b40e2 OpcodeDispatcher: pair save mxcsr 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:41 -04:00
Alyssa Rosenzweig 9bb43264b5 OpcodeDispatcher: pair SSE store 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-08-20 18:33:37 -04:00