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Author SHA1 Message Date
Ryan Houdek 8633528cee Merge pull request #2502 from lioncash/flag 
OpcodeDispatcher: Handle VPINSRB/VPINSRD/VPINSRQ/VPINSRW
 2023-03-14 11:44:06 -07:00
Lioncache ce961a3ef4 OpcodeDispatcher: Handle VPINSRD/VPINSRQ 
These are handled from the same encoding via the VEX.W bit.
 2023-03-14 14:17:59 -04:00
Lioncache 8ce87d3b27 OpcodeDispatcher: Handle VPINSRW 2023-03-14 14:17:55 -04:00
Lioncache 24f03dd740 OpcodeDispatcher: Handle VPINSRB 2023-03-14 14:16:44 -04:00
Lioncache a1b0d1853b OpcodeDispatcher: Move PINSROp implementation to helper 2023-03-14 14:16:44 -04:00
Lioncache 6531d369cd Frontend: Handle 'op DST_XMM, SRC_XMM, GPR' AVX patterns 
Things like VPINSRB and co. use this pattern, as well as VCVTSI2S{D,S}.

No other VEX-encoded instructions expect the first source to be a GPR
aside from some of the BMI1/BMI2 instructions, so we'll need to check
for this case.
 2023-03-14 14:16:41 -04:00
Ryan Houdek 7344680672 Merge pull request #2501 from lioncash/ind 
ARMEmitter: Handle floating-point multiply add (indexed) groups
 2023-03-14 08:58:35 -07:00
Lioncache 16ae9ad1c7 ARMEmitter: Handle SVE floating point matrix multiply accumulate category 2023-03-14 11:37:49 -04:00
Lioncache 737400fd84 ARMEmitter: Handle SVE floating-point multiply (indexed) category 2023-03-14 11:22:51 -04:00
Lioncache 331cf66fda ARMEmitter: Make FCMLA (indexed) use the SVEFPMultiplyAddIndexed helper 
Same behavior, but without all of the code duplication.
 2023-03-14 11:19:19 -04:00
Lioncache 96c35a7bc7 ARMEmitter: Move fcmla (indexed) down to it's label 
Just code movement to get rid of a TODO.
 2023-03-14 11:05:14 -04:00
Lioncache 15903f5300 ARMEmitter: Handle SVE floating-point multiply-add (indexed) group 2023-03-14 11:01:49 -04:00
Ryan Houdek a8ed2af658 Merge pull request #2498 from Sonicadvance1/begin_the_stl_torment 
FEXCore: Adds fexctl container alias objects
 2023-03-14 07:30:12 -07:00
Ryan Houdek 3a81efdb28 Merge pull request #2494 from Sonicadvance1/sra_on_32bit 
Arm64: Reclaim SRA registers on 32-bit
 2023-03-14 07:30:00 -07:00
Ryan Houdek 3275dabd85 Merge pull request #2499 from lioncash/mla 
ARMEmitter: Handle SVE Floating Point Multiply-Add group
 2023-03-14 07:16:36 -07:00
Ryan Houdek 64c45ed70a Arm64: Reclaim SRA registers on 32-bit 
Causes Portal to go from 85FPS to 120FPS on Lenovo X13s.

When running in 32-bit mode we were wasting 8 GPRs and 8 FPRs by still
allocating the top 8 registers of each even though 32-bit can't use
them.

Reallocate them to be register allocated registers when running 32-bit
applications which reduces spills and lowers the cost of
spilling/filling SRA registers.

Quite a significant speed boost for a little bit of work.
 2023-03-14 07:15:05 -07:00
Lioncache 02d7f68094 ARMEmitter: Handle SVE Floating Point Multiply-Add group 2023-03-14 09:57:23 -04:00
Ryan Houdek afdc037110 FEXCore: Adds fexctl container alias objects 
Completely unused right now, this will very quickly spread throughout
the entire codebase.

Currently only containers with FEX's global allocator usage.
Any STL class that is allocation free and has been vetted to fit within
the guidelines of not allocating memory will get an alias inside of
`fextl`.

This means that any std:: namespace usage going forward will need to be
scrutinized heavily. As aliasing it will mean it is vetted, otherwise it
needs to be checked with FEX CI (once in place) to ensure it doesn't
allocate memory behind our back.

Aliases everything we allow from std:: reduces mental burden from
needing to check if it is okay to use or not. Additionally it will allow
us to quickly pivot to the EASTL if we find as some point during this
transition that this will in-fact not work.

Once this is committed, we are going to be moving very quickly to
piecemeal convert /everything/ in the codebase over to fextl:: namespace
from std::.

I am sorry for the hellscape that will follow.
 2023-03-14 06:56:44 -07:00
Mai 6e0a1a5f14 Merge pull request #2490 from Sonicadvance1/enable_fast_movs_cpuid 
CPUID: Enable FAST REP MOVS
 2023-03-13 16:20:17 -04:00
Mai ad332e3c30 Merge pull request #2492 from Sonicadvance1/signaldelegator_remove_unused 
SignalDelegator: Cleanup unused functions
 2023-03-13 16:19:48 -04:00
Mai 1aeab04c9f Merge pull request #2491 from Sonicadvance1/remove_unused_fd_mapping 
FM: Remove unused FD to Name mapping
 2023-03-13 16:17:45 -04:00
Mai aba42570a1 Merge pull request #2495 from Sonicadvance1/mingw_cmake 
CMake: Get past configuration when mingw is used
 2023-03-13 16:17:12 -04:00
Mai 7f243ee08a Merge pull request #2496 from Sonicadvance1/remove_get_nprocs 
CPUInfo: Switch away from using get_nprocs_conf
 2023-03-13 16:16:31 -04:00
Mai 82f7bb282f Merge pull request #2497 from Sonicadvance1/intrusive_ir_alloc 
IntrusiveIRList: Ensure this is using the FEX allocator
 2023-03-13 16:16:08 -04:00
Ryan Houdek 1248f3573c CPUInfo: Switch away from using get_nprocs_conf 
Allocates memory behind our backs. Needed to make CI glibc allocator
clean.
 2023-03-13 10:50:25 -07:00
Ryan Houdek d89f53cfd3 IntrusiveIRList: Ensure this is using the FEX allocator 
Necessary to be glibc allocator clean.
 2023-03-13 10:48:23 -07:00
Ryan Houdek 89f1e61779 CMake: Get past configuration when mingw is used 
Right now cmake doesn't even get past the configuration stage when mingw
is used.
If mingw is detected, setup cmake so it can at least configure itself.
Will be necessary for cleaning up the rest of the codebase.
 2023-03-12 16:37:35 -07:00
Ryan Houdek 11d396ca06 Merge pull request #2486 from lioncash/zero 
ARMEmitter: Handle SVE floating-point compare with zero group
 2023-03-11 15:35:06 -08:00
Ryan Houdek 3ff7cf19c0 FM: Remove unused FD to Name mapping 
This was completely unused so this just reduces some syscall signal
mutex locking around FD operations.
 2023-03-10 16:30:49 -08:00
Ryan Houdek 11bbfe5bed SignalDelegator: Cleanup unused functions 
Also changes the error log to an assert log to ensure the crashing
process doesn't spin forever.
 2023-03-10 16:18:14 -08:00
Ryan Houdek 07aa5327f4 CPUID: Enable FAST REP MOVS 
Even without this being an optimal implementation, enabling this option
reduces the amount of time spent in memmove in Hollow Knight.

Before:
```
10.07%  [JIT] tid 284422  [.] /usr/lib/x86_64-linux-gnu/libc.so.6+0x17d780 (0x7fbcef8d6dfd)
```

After:
```
0.53%  [JIT] tid 288916  [.] /usr/lib/x86_64-linux-gnu/libc.so.6+0x17d780 (0x7f0cbe0dc608)
```
 2023-03-10 15:44:51 -08:00
Lioncache c6ba51ee35 ARMEmitter: Handle SVE floating-point compare with zero group 2023-03-09 01:13:33 -05:00
Ryan Houdek cd40a85567 Merge pull request #2485 from lioncash/serial 
ARMEmitter: Handle SVE Floating-point Serial Reduction (Predicated) group
 2023-03-08 21:52:31 -08:00
Lioncache 19125720c2 ARMEmitter: Handle SVE Floating-point Serial Reduction (Predicated) group 2023-03-09 00:16:38 -05:00
Ryan Houdek 9b70c1d4ac Merge pull request #2484 from lioncash/unary 
ARMEmitter: Handle SVE Floating Point Unary Operations - Unpredicated group
 2023-03-08 20:58:32 -08:00
Lioncache 02d06ee833 ARMEmitter: Handle SVE Floating Point Unary Operations - Unpredicated group 2023-03-08 23:11:50 -05:00
Ryan Houdek 5e8d9601ed Merge pull request #2483 from lioncash/ldrr 
ARMEmitter: Handle LDR (vector)
 2023-03-08 19:59:34 -08:00
Lioncache 640cfcd0bd ARMEmitter: Make LDR (predicate) take an XRegister 
Matches assembly use more closely.
 2023-03-08 22:45:15 -05:00
Lioncache 5d71dfed86 ARMEmitter: Handle LDR (vector) 
Now we have the vector variant as well as the predicate variant.
 2023-03-08 22:43:13 -05:00
Ryan Houdek 1c3af30e96 Merge pull request #2482 from lioncash/pred 
ARMEmitter: Move op and assertions into SVEFloatArithmeticPredicated helper
 2023-03-08 19:32:09 -08:00
Lioncache a06fc3641f ARMEmitter: Handle FTMAD 
Finishes off the only top-level instruction in the SVE Floating-Point
Arithemtic - Predicated group (also FTMAD is unpredicated, so cool).
 2023-03-08 22:13:49 -05:00
Lioncache 5cbf984743 ARMEmitter: Move op and assertions into SVEFloatArithmeticPredicated helper 
Deduplicates some code.
 2023-03-08 22:13:44 -05:00
Ryan Houdek d1ece88bed Merge pull request #2481 from lioncash/align 
unittests: Change alignment directive in 256-bit VPSADBW test to 32
 2023-03-08 19:01:38 -08:00
Lioncache b1a00b05c4 unittests: Change alignment directive in 256-bit VPSADBW test to 32 
Meant to change this over when writing the test, but forgot.
 2023-03-08 21:26:20 -05:00
Ryan Houdek 1087c45b6c Merge pull request #2480 from lioncash/psadbw 
OpcodeDispatcher: Handle VPSADBW
 2023-03-08 18:25:23 -08:00
Lioncache d9da63d492 OpcodeDispatcher: Handle VPSADBW 2023-03-08 21:02:44 -05:00
Lioncache 597ffe5ba6 OpcodeDispatcher: Factor out PSADBW implementation to helper 
This can be reused when implementing the AVX equivalent of the
operation.
 2023-03-08 18:40:59 -05:00
Ryan Houdek 6517f7eb30 Merge pull request #2479 from lioncash/test 
OpcodeDispatcher: Handle VTESTPD/VTESTPS
 2023-03-08 15:25:47 -08:00
Lioncache 73ff932bb6 OpcodeDispatcher: Handle VTESTPD 2023-03-08 17:27:41 -05:00
Lioncache 9b742b1fac OpcodeDispatcher: Handle VTESTPS 2023-03-08 17:27:41 -05:00